43   UINT32  RegVal;  in EnableDmaChannel()  local
58   RegVal = MmioRead32 (DMA4_CSDP (Channel));  in EnableDmaChannel()
61   RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );  in EnableDmaChannel()
62   RegVal = ((RegVal & ~(0x3 <<  7)) | (DMA4->ReadPortAccessType << 7));  in EnableDmaChannel()
63   RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));  in EnableDmaChannel()
64   RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));  in EnableDmaChannel()
65   RegVal = ((RegVal & ~(0x1 << 19)) | (DMA4->DestinationEndianism << 19));  in EnableDmaChannel()
66   RegVal = ((RegVal & ~(0x3 << 16)) | (DMA4->WriteMode << 16));  in EnableDmaChannel()
67   RegVal = ((RegVal & ~(0x1 <<  6)) | (DMA4->SourcePacked << 6));  in EnableDmaChannel()
68   RegVal = ((RegVal & ~(0x1 << 13)) | (DMA4->DestinationPacked << 13));  in EnableDmaChannel()
70   MmioWrite32 (DMA4_CSDP (Channel), RegVal);  in EnableDmaChannel()
89   RegVal = MmioRead32 (DMA4_CCR (Channel));  in EnableDmaChannel()
92   RegVal  = ((RegVal &  ~0x1f)            | DMA4->ReadRequestNumber);  in EnableDmaChannel()
93   RegVal  = ((RegVal &  ~(BIT20 | BIT19)) | DMA4->WriteRequestNumber << 19);  in EnableDmaChannel()
94   RegVal  = ((RegVal & ~(0x3 << 12)) | (DMA4->ReadPortAccessMode << 12));  in EnableDmaChannel()
95   RegVal  = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessMode << 14));  in EnableDmaChannel()
96   RegVal  = ((RegVal & ~(0x1 <<  6)) | (DMA4->ReadPriority << 6));  in EnableDmaChannel()
97   RegVal  = ((RegVal & ~(0x1 << 26)) | (DMA4->WritePriority << 26));  in EnableDmaChannel()
100   MmioWrite32 (DMA4_CCR (Channel), RegVal);  in EnableDmaChannel()