Lines Matching +refs:llvm +refs:mode +refs:map
40 These interfaces are defined in ``include/llvm/Target/``.
45 ``include/llvm/CodeGen/``. At this level, concepts like "constant pool
194 The LLVM target description classes (located in the ``include/llvm/Target``
330 ``include/llvm/CodeGen``). This representation is completely target agnostic,
369 .. code-block:: llvm
382 the ``include/llvm/CodeGen/MachineInstrBuilder.h`` file. The ``BuildMI``
429 .. code-block:: llvm
439 .. code-block:: llvm
456 .. code-block:: llvm
501 a one-to-many mapping (i.e. one LLVM basic block can map to multiple machine
515 a ``MachineRegisterInfo``. See ``include/llvm/CodeGen/MachineFunction.h`` for
603 llvm-mc tool to implement standalone machine code assemblers and disassemblers.
622 This API is most important for two clients: the llvm-mc stand-alone assembler is
641 To make llvm use these classes, the target initialization must call
747 ``include/llvm/CodeGen/ISDOpcodes.h`` file.
960 .. code-block:: llvm
968 .. code-block:: llvm
1001 are defined in the ``include/llvm/Target/TargetSelectionDAG.td`` file.
1035 * In addition to instructions, targets can specify arbitrary patterns that map
1054 * When using the 'Pat' class to map a pattern to an instruction that has one
1055 or more complex operands (like e.g. `X86 addressing mode`_), the pattern may
1086 values (e.g. the four operands of the `X86 addressing mode`_, which are
1306 There are two ways to map virtual registers to physical registers (or to memory
1323 inserting load and store instructions. In order to map a virtual register to a
1324 physical one, use ``VirtRegMap::assignVirt2Phys(vreg, preg)``. In order to map
1327 slot where ``vreg``'s value will be located. If it is necessary to map another
1429 stand-alone mode for triaging bugs and as a performance baseline.
1484 ``RBP-1020``). The offset (divided by 4 in 32-bit mode and 8 in 64-bit mode)
1505 32-bit mode and 8 in 64-bit mode) is encoded in bits 16-23 (mask:
1506 ``0x00FF0000``). There is a maximum stack size of 1024 bytes in 32-bit mode
1507 and 2048 in 64-bit mode. The number of registers saved is encoded in bits 9-12
1624 ``llvm/CodeGen/DFAPacketizer.h`` for more information.
1950 by implementing the MCAsmParser interface. This is required for llvm-mc to be
1980 The ARM backend has basic support for integer code in ARM codegen mode, but
2060 .. code-block:: llvm
2103 .. code-block:: llvm
2156 .. _X86 addressing mode:
2262 or shrink. A base pointer is also used if llvm-gcc is not passed the
2300 GPR, thus the linkage area is 24 bytes long in 32 bit mode and 48 bytes in 64
2301 bit mode.
2371 bit mode.) Also note that since the parameter area is a fixed offset from the
2376 stack frame is minimally 64 bytes in 32 bit mode and 128 bytes in 64 bit mode.
2386 The *locals area* is where the llvm compiler reserves space for local variables.
2388 The *saved registers area* is where the llvm compiler spills callee saved
2394 The llvm prolog and epilog are the same as described in the PowerPC ABI, with
2396 created. This allows the llvm epilog/prolog support to be common with other
2550 | mode | size | instruction class |
2597 support bloom filters, radix trees, etc. A map is defined by its type,
2610 using the read-only frame pointer R10. eBPF registers map 1:1 to hardware