386                                        const MachineInstr &MI1,  in produceSameValue()  argument
388   return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs);  in produceSameValue()
570   MachineInstr *MI1 = nullptr;  in hasReassociableOperands()  local
573     MI1 = MRI.getUniqueVRegDef(Op1.getReg());  in hasReassociableOperands()
578   return MI1 && MI2 && MI1->getParent() == MBB && MI2->getParent() == MBB;  in hasReassociableOperands()
585   MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg());  in hasReassociableSibling()  local
591   Commuted = MI1->getOpcode() != AssocOpcode && MI2->getOpcode() == AssocOpcode;  in hasReassociableSibling()
593     std::swap(MI1, MI2);  in hasReassociableSibling()
599   return MI1->getOpcode() == AssocOpcode &&  in hasReassociableSibling()
600          hasReassociableOperands(*MI1, MBB) &&  in hasReassociableSibling()
601          MRI.hasOneNonDBGUse(MI1->getOperand(0).getReg());  in hasReassociableSibling()