Lines Matching refs:SimpleTy
286 switch (VT.SimpleTy) { in getImplicitScaleFactor()
1086 switch (RetVT.SimpleTy) { in emitAddSub()
1105 RetVT.SimpleTy = std::max(RetVT.SimpleTy, MVT::i32); in emitAddSub()
1405 switch (VT.SimpleTy) { in emitCmp()
1595 MVT VT = std::max(MVT::i32, RetVT.SimpleTy); in emitLogicalOp()
1617 switch (RetVT.SimpleTy) { in emitLogicalOp_ri()
1668 switch (RetVT.SimpleTy) { in emitLogicalOp_rs()
1775 switch (VT.SimpleTy) { in emitLoad()
2041 switch (VT.SimpleTy) { in emitStore()
2586 switch (VT.SimpleTy) { in selectSelect()
2851 MVT VT = ArgVT.getSimpleVT().SimpleTy; in fastLowerArguments()
3466 switch (VT.SimpleTy) { in fastLowerIntrinsicCall()
3800 switch (DestVT.SimpleTy) { in selectTrunc()
3867 switch (RetVT.SimpleTy) { in emitMul_rr()
3909 switch (RetVT.SimpleTy) { in emitLSL_rr()
3933 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitLSL_ri()
3997 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitLSL_ri()
4015 switch (RetVT.SimpleTy) { in emitLSR_rr()
4040 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitLSR_ri()
4118 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitLSR_ri()
4136 switch (RetVT.SimpleTy) { in emitASR_rr()
4161 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitASR_ri()
4227 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitASR_ri()
4257 switch (SrcVT.SimpleTy) { in emitIntExt()
4685 switch (RetVT.SimpleTy) { in selectBitCast()
4711 switch (RetVT.SimpleTy) { in selectFRem()