Lines Matching refs:EXTRACT_VECTOR_ELT
496 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in AArch64TargetLowering()
665 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom); in addTypeForNEON()
2367 case ISD::EXTRACT_VECTOR_ELT: in LowerOperation()
4962 else if (V.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in ReconstructShuffle()
5701 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, SrcVec, SrcLaneV), in LowerVECTOR_SHUFFLE()
6342 if (Value.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in LowerBUILD_VECTOR()
6481 assert(Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT && "Unknown opcode!"); in LowerEXTRACT_VECTOR_ELT()
6511 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ExtrTy, WideVec, in LowerEXTRACT_VECTOR_ELT()
8141 if (Op1.getOpcode() == ISD::EXTRACT_VECTOR_ELT) { in tryCombineFixedPointConvert()
8165 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResTy, Convert, Lane); in tryCombineFixedPointConvert()
8524 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, N->getValueType(0), in combineAcrossLanesIntrinsic()
9044 ISD::EXTRACT_VECTOR_ELT, DL, N->getValueType(0), in tryMatchAcrossLaneShuffleForReduction()
9082 if (N0.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in performAcrossLaneMinMaxReductionCombine()
9083 IfTrue.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in performAcrossLaneMinMaxReductionCombine()
9084 IfFalse.getOpcode() != ISD::EXTRACT_VECTOR_ELT) in performAcrossLaneMinMaxReductionCombine()
9905 case ISD::EXTRACT_VECTOR_ELT: in PerformDAGCombine()