Lines Matching refs:WriteRes

130 def : WriteRes<WriteImm, [CyUnitI]>;
149 def : WriteRes<WriteI, [CyUnitI]>;
155 def : WriteRes<WriteISReg, [CyUnitIS]> {
163 def : WriteRes<WriteIEReg, [CyUnitIS]> {
170 def : WriteRes<WriteIS, [CyUnitIS]>;
175 def : WriteRes<WriteExtr, [CyUnitIS, CyUnitIS]> {
191 def : WriteRes<WriteIM32, [CyUnitIM]> {
195 def : WriteRes<WriteIM64, [CyUnitIM]> {
206 def : WriteRes<WriteID32, [CyUnitID, CyUnitIntDiv]> {
213 def : WriteRes<WriteID64, [CyUnitID, CyUnitIntDiv]> {
223 def : WriteRes<WriteLD, [CyUnitLS]> {
233 def : WriteRes<WriteST, [CyUnitLS]> {
264 def : WriteRes<WriteAdr, [CyUnitI]>;
267 def : WriteRes<WriteLDHi, []> {
281 def : WriteRes<WriteBr,    [CyUnitB]>  {let Latency = 0;}
282 def : WriteRes<WriteBrReg, [CyUnitBR]> {let Latency = 0;}
289 def : WriteRes<WriteHint, []> {let Latency = 0;}
293 def : WriteRes<WriteBarrier, [CyUnitLS]>;
297 def : WriteRes<WriteSys, []> {let Latency = -1;}
303 def : WriteRes<WriteV, [CyUnitV]> {let Latency = 2;}
312 def : WriteRes<WriteF, [CyUnitV]> {let Latency = 2;}
324 def : WriteRes<WriteFImm, [CyUnitV]> {let Latency = 2;}
346 def : WriteRes<WriteFCopy, [CyUnitLS]> {
462 def : WriteRes<WriteFCmp, [CyUnitVC]> {let Latency = 4;}
515 def : WriteRes<WriteFMul, [CyUnitVM]> { let Latency = 4;}
550 def : WriteRes<WriteFDiv, [CyUnitVD, CyUnitFloatDiv]> {
575 def : WriteRes<WriteFCvt, [CyUnitV]> {let Latency = 4;}
612 def : WriteRes<WriteVLD, [CyUnitLS]> {
617 def : WriteRes<WriteVST, [CyUnitLS]> {
856 def : WriteRes<WriteAtomic, []> { let Unsupported = 1; }