Lines Matching defs:Op

687 SDValue AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,  in LowerDYNAMIC_STACKALLOC()
698 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, in LowerOperation()
845 SDValue Op, in LowerGlobalAddress()
895 SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op, in LowerCONCAT_VECTORS()
905 SDValue AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op, in LowerEXTRACT_SUBVECTOR()
917 SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, in LowerINTRINSIC_WO_CHAIN()
1028 AMDGPUTargetLowering::split64BitValue(SDValue Op, SelectionDAG &DAG) const { in split64BitValue()
1042 SDValue AMDGPUTargetLowering::getLoHalf64(SDValue Op, SelectionDAG &DAG) const { in getLoHalf64()
1050 SDValue AMDGPUTargetLowering::getHiHalf64(SDValue Op, SelectionDAG &DAG) const { in getHiHalf64()
1058 SDValue AMDGPUTargetLowering::SplitVectorLoad(const SDValue Op, in SplitVectorLoad()
1116 SDValue AMDGPUTargetLowering::MergeVectorStore(const SDValue &Op, in MergeVectorStore()
1174 SDValue AMDGPUTargetLowering::SplitVectorStore(SDValue Op, in SplitVectorStore()
1231 SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG, in LowerDIVREM24()
1334 void AMDGPUTargetLowering::LowerUDIVREM64(SDValue Op, in LowerUDIVREM64()
1412 SDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op, in LowerUDIVREM()
1527 SDValue AMDGPUTargetLowering::LowerSDIVREM(SDValue Op, in LowerSDIVREM()
1588 SDValue AMDGPUTargetLowering::LowerFREM(SDValue Op, SelectionDAG &DAG) const { in LowerFREM()
1603 SDValue AMDGPUTargetLowering::LowerFCEIL(SDValue Op, SelectionDAG &DAG) const { in LowerFCEIL()
1643 SDValue AMDGPUTargetLowering::LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const { in LowerFTRUNC()
1692 SDValue AMDGPUTargetLowering::LowerFRINT(SDValue Op, SelectionDAG &DAG) const { in LowerFRINT()
1719 SDValue AMDGPUTargetLowering::LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const { in LowerFNEARBYINT()
1727 SDValue AMDGPUTargetLowering::LowerFROUND32(SDValue Op, SelectionDAG &DAG) const { in LowerFROUND32()
1755 SDValue AMDGPUTargetLowering::LowerFROUND64(SDValue Op, SelectionDAG &DAG) const { in LowerFROUND64()
1812 SDValue AMDGPUTargetLowering::LowerFROUND(SDValue Op, SelectionDAG &DAG) const { in LowerFROUND()
1824 SDValue AMDGPUTargetLowering::LowerFFLOOR(SDValue Op, SelectionDAG &DAG) const { in LowerFFLOOR()
1849 SDValue AMDGPUTargetLowering::LowerCTLZ(SDValue Op, SelectionDAG &DAG) const { in LowerCTLZ()
1903 SDValue AMDGPUTargetLowering::LowerINT_TO_FP32(SDValue Op, SelectionDAG &DAG, in LowerINT_TO_FP32()
1988 SDValue AMDGPUTargetLowering::LowerINT_TO_FP64(SDValue Op, SelectionDAG &DAG, in LowerINT_TO_FP64()
2011 SDValue AMDGPUTargetLowering::LowerUINT_TO_FP(SDValue Op, in LowerUINT_TO_FP()
2026 SDValue AMDGPUTargetLowering::LowerSINT_TO_FP(SDValue Op, in LowerSINT_TO_FP()
2041 SDValue AMDGPUTargetLowering::LowerFP64_TO_INT(SDValue Op, SelectionDAG &DAG, in LowerFP64_TO_INT()
2070 SDValue AMDGPUTargetLowering::LowerFP_TO_SINT(SDValue Op, in LowerFP_TO_SINT()
2080 SDValue AMDGPUTargetLowering::LowerFP_TO_UINT(SDValue Op, in LowerFP_TO_UINT()
2090 SDValue AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, in LowerSIGN_EXTEND_INREG()
2118 static bool isU24(SDValue Op, SelectionDAG &DAG) { in isU24()
2126 static bool isI24(SDValue Op, SelectionDAG &DAG) { in isI24()
2136 static void simplifyI24(SDValue Op, TargetLowering::DAGCombinerInfo &DCI) { in simplifyI24()
2482 const SDLoc &SL, SDValue Op) { in getFFBH_U32()
2918 const SDValue Op, in computeKnownBitsForTargetNode()
2957 SDValue Op, in ComputeNumSignBitsForTargetNode()