Lines Matching refs:isSEXTLoad
6490 if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N)) in isSignExtended()
11455 bool isSEXTLoad, SDValue &Base, in getARMIndexedAddressParts() argument
11461 if (VT == MVT::i16 || ((VT == MVT::i8 || VT == MVT::i1) && isSEXTLoad)) { in getARMIndexedAddressParts()
11514 bool isSEXTLoad, SDValue &Base, in getT2IndexedAddressParts() argument
11551 bool isSEXTLoad = false; in getPreIndexedAddressParts() local
11555 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPreIndexedAddressParts()
11565 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
11568 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
11590 bool isSEXTLoad = false; in getPostIndexedAddressParts() local
11594 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPostIndexedAddressParts()
11604 isLegal = getT2IndexedAddressParts(Op, VT, isSEXTLoad, Base, Offset, in getPostIndexedAddressParts()
11607 isLegal = getARMIndexedAddressParts(Op, VT, isSEXTLoad, Base, Offset, in getPostIndexedAddressParts()