Lines Matching refs:OpNode
2435 string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
2438 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm))))]>;
2441 string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
2444 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vm))))]>;
2500 ValueType TyD, ValueType TyQ, SDNode OpNode>
2503 [(set DPR:$Vd, (TyD (OpNode (TyQ QPR:$Vm))))]>;
2518 ValueType TyQ, ValueType TyD, SDNode OpNode>
2521 [(set QPR:$Vd, (TyQ (OpNode (TyD DPR:$Vm))))]>;
2547 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
2551 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]> {
2560 SDNode OpNode, bit Commutable>
2564 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]>{
2598 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
2602 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]> {
2609 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
2613 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]>{
2771 ValueType Ty, SDPatternOperator MulOp, SDPatternOperator OpNode>
2775 [(set DPR:$Vd, (Ty (OpNode DPR:$src1,
2807 SDPatternOperator MulOp, SDPatternOperator OpNode>
2811 [(set QPR:$Vd, (Ty (OpNode QPR:$src1,
2844 ValueType Ty, SDPatternOperator IntOp, SDNode OpNode>
2848 [(set DPR:$Vd, (Ty (OpNode DPR:$src1,
2852 ValueType Ty, SDPatternOperator IntOp, SDNode OpNode>
2856 [(set QPR:$Vd, (Ty (OpNode QPR:$src1,
2881 ValueType TyQ, ValueType TyD, SDNode MulOp, SDNode OpNode>
2885 [(set QPR:$Vd, (OpNode (TyQ QPR:$src1),
2890 ValueType TyQ, ValueType TyD, SDNode MulOp, SDNode OpNode>
2896 (OpNode (TyQ QPR:$src1),
2902 ValueType TyQ, ValueType TyD, SDNode MulOp, SDNode OpNode>
2908 (OpNode (TyQ QPR:$src1),
2917 SDNode OpNode>
2921 [(set QPR:$Vd, (OpNode (TyQ QPR:$src1),
2976 ValueType TyQ, ValueType TyD, SDNode OpNode, bit Commutable>
2980 [(set QPR:$Vd, (TyQ (OpNode (TyD DPR:$Vn), (TyD DPR:$Vm))))]> {
2986 ValueType TyQ, ValueType TyD, SDNode OpNode>
2991 (TyQ (OpNode (TyD DPR:$Vn),
2995 ValueType TyQ, ValueType TyD, SDNode OpNode>
3000 (TyQ (OpNode (TyD DPR:$Vn),
3006 ValueType TyQ, ValueType TyD, SDNode OpNode, SDNode ExtOp,
3011 [(set QPR:$Vd, (OpNode (TyQ (ExtOp (TyD DPR:$Vn))),
3073 SDNode OpNode, SDNode ExtOp, bit Commutable>
3077 [(set QPR:$Vd, (OpNode (TyQ QPR:$Vn),
3125 string OpcodeStr, string Dt, ValueType Ty, SDNode OpNode>
3129 [(set DPR:$Vd, (Ty (OpNode (Ty DPR:$Vm), (i32 imm:$SIMM))))]>;
3132 string OpcodeStr, string Dt, ValueType Ty, SDNode OpNode>
3136 [(set QPR:$Vd, (Ty (OpNode (Ty QPR:$Vm), (i32 imm:$SIMM))))]>;
3143 SDPatternOperator OpNode>
3147 [(set QPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm), ImmTy:$SIMM)))]>;
3153 SDPatternOperator OpNode>
3157 [(set DPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vm),
3233 string asm, SDNode OpNode> {
3238 [(set DPR:$Vd, (v8i8 (OpNode (v8i8 DPR:$Vm))))]>;
3242 [(set DPR:$Vd, (v4i16 (OpNode (v4i16 DPR:$Vm))))]>;
3246 [(set DPR:$Vd, (v2i32 (OpNode (v2i32 DPR:$Vm))))]>;
3250 [(set DPR:$Vd, (v2i32 (OpNode (v2f32 DPR:$Vm))))]> {
3256 [(set DPR:$Vd, (v4i16 (OpNode (v4f16 DPR:$Vm))))]>,
3265 [(set QPR:$Vd, (v16i8 (OpNode (v16i8 QPR:$Vm))))]>;
3269 [(set QPR:$Vd, (v8i16 (OpNode (v8i16 QPR:$Vm))))]>;
3273 [(set QPR:$Vd, (v4i32 (OpNode (v4i32 QPR:$Vm))))]>;
3277 [(set QPR:$Vd, (v4i32 (OpNode (v4f32 QPR:$Vm))))]> {
3283 [(set QPR:$Vd, (v8i16 (OpNode (v8f16 QPR:$Vm))))]>,
3319 SDNode OpNode> {
3322 v8i8, v8i16, OpNode>;
3325 v4i16, v4i32, OpNode>;
3328 v2i32, v2i64, OpNode>;
3352 string OpcodeStr, string Dt, SDNode OpNode> {
3354 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, OpNode>;
3356 OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, OpNode>;
3358 OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, OpNode>;
3369 SDNode OpNode, bit Commutable = 0> {
3373 v8i8, v8i8, OpNode, Commutable>;
3376 v4i16, v4i16, OpNode, Commutable>;
3379 v2i32, v2i32, OpNode, Commutable>;
3384 v16i8, v16i8, OpNode, Commutable>;
3387 v8i16, v8i16, OpNode, Commutable>;
3390 v4i32, v4i32, OpNode, Commutable>;
3405 SDNode OpNode, bit Commutable = 0>
3407 OpcodeStr, Dt, OpNode, Commutable> {
3410 v1i64, v1i64, OpNode, Commutable>;
3413 v2i64, v2i64, OpNode, Commutable>;
3560 SDNode OpNode, bit Commutable = 0> {
3563 v8i16, v8i8, OpNode, Commutable>;
3566 v4i32, v4i16, OpNode, Commutable>;
3569 v2i64, v2i32, OpNode, Commutable>;
3574 SDNode OpNode> {
3576 !strconcat(Dt, "16"), v4i32, v4i16, OpNode>;
3578 !strconcat(Dt, "32"), v2i64, v2i32, OpNode>;
3584 SDNode OpNode, SDNode ExtOp, bit Commutable = 0> {
3587 v8i16, v8i8, OpNode, ExtOp, Commutable>;
3590 v4i32, v4i16, OpNode, ExtOp, Commutable>;
3593 v2i64, v2i32, OpNode, ExtOp, Commutable>;
3652 SDNode OpNode, SDNode ExtOp, bit Commutable = 0> {
3655 v8i16, v8i8, OpNode, ExtOp, Commutable>;
3658 v4i32, v4i16, OpNode, ExtOp, Commutable>;
3661 v2i64, v2i32, OpNode, ExtOp, Commutable>;
3670 string OpcodeStr, string Dt, SDNode OpNode> {
3673 OpcodeStr, !strconcat(Dt, "8"), v8i8, mul, OpNode>;
3675 OpcodeStr, !strconcat(Dt, "16"), v4i16, mul, OpNode>;
3677 OpcodeStr, !strconcat(Dt, "32"), v2i32, mul, OpNode>;
3681 OpcodeStr, !strconcat(Dt, "8"), v16i8, mul, OpNode>;
3683 OpcodeStr, !strconcat(Dt, "16"), v8i16, mul, OpNode>;
3685 OpcodeStr, !strconcat(Dt, "32"), v4i32, mul, OpNode>;
3709 SDNode OpNode> {
3712 OpcodeStr, !strconcat(Dt, "8"), v8i8, IntOp, OpNode>;
3714 OpcodeStr, !strconcat(Dt, "16"), v4i16, IntOp, OpNode>;
3716 OpcodeStr, !strconcat(Dt, "32"), v2i32, IntOp, OpNode>;
3720 OpcodeStr, !strconcat(Dt, "8"), v16i8, IntOp, OpNode>;
3722 OpcodeStr, !strconcat(Dt, "16"), v8i16, IntOp, OpNode>;
3724 OpcodeStr, !strconcat(Dt, "32"), v4i32, IntOp, OpNode>;
3766 SDNode OpNode> {
3768 !strconcat(Dt, "8"), v8i16, v8i8, MulOp, OpNode>;
3770 !strconcat(Dt, "16"), v4i32, v4i16, MulOp, OpNode>;
3772 !strconcat(Dt, "32"), v2i64, v2i32, MulOp, OpNode>;
3776 string Dt, SDNode MulOp, SDNode OpNode> {
3778 !strconcat(Dt,"16"), v4i32, v4i16, MulOp, OpNode>;
3780 !strconcat(Dt, "32"), v2i64, v2i32, MulOp, OpNode>;
3816 SDPatternOperator IntOp, SDNode ExtOp, SDNode OpNode> {
3819 IntOp, ExtOp, OpNode>;
3822 IntOp, ExtOp, OpNode>;
3825 IntOp, ExtOp, OpNode>;
3880 SDNode OpNode> {
3883 OpcodeStr, !strconcat(Dt, "8"), v8i8, OpNode> {
3887 OpcodeStr, !strconcat(Dt, "16"), v4i16, OpNode> {
3891 OpcodeStr, !strconcat(Dt, "32"), v2i32, OpNode> {
3895 OpcodeStr, !strconcat(Dt, "64"), v1i64, OpNode>;
3900 OpcodeStr, !strconcat(Dt, "8"), v16i8, OpNode> {
3904 OpcodeStr, !strconcat(Dt, "16"), v8i16, OpNode> {
3908 OpcodeStr, !strconcat(Dt, "32"), v4i32, OpNode> {
3912 OpcodeStr, !strconcat(Dt, "64"), v2i64, OpNode>;
3917 string baseOpc, SDNode OpNode> {
3920 OpcodeStr, !strconcat(Dt, "8"), v8i8, OpNode> {
3924 OpcodeStr, !strconcat(Dt, "16"), v4i16, OpNode> {
3928 OpcodeStr, !strconcat(Dt, "32"), v2i32, OpNode> {
3932 OpcodeStr, !strconcat(Dt, "64"), v1i64, OpNode>;
3937 OpcodeStr, !strconcat(Dt, "8"), v16i8, OpNode> {
3941 OpcodeStr, !strconcat(Dt, "16"), v8i16, OpNode> {
3945 OpcodeStr, !strconcat(Dt, "32"), v4i32, OpNode> {
3949 OpcodeStr, !strconcat(Dt, "64"), v2i64, OpNode>;
4072 SDPatternOperator OpNode> {
4074 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, imm1_7, OpNode> {
4078 OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, imm1_15, OpNode> {
4082 OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, imm1_31, OpNode> {
4091 SDPatternOperator OpNode> {
4094 v8i8, v8i16, shr_imm8, OpNode> {
4099 v4i16, v4i32, shr_imm16, OpNode> {
4104 v2i32, v2i64, shr_imm32, OpNode> {
6622 class N2VSPat<SDNode OpNode, NeonI Inst>
6623 : NEONFPPat<(f32 (OpNode SPR:$a)),
6630 class N3VSPat<SDNode OpNode, NeonI Inst>
6631 : NEONFPPat<(f32 (OpNode SPR:$a, SPR:$b)),
6641 class N3VSMulOpPat<SDNode MulNode, SDNode OpNode, NeonI Inst>
6642 : NEONFPPat<(f32 (OpNode SPR:$acc, (f32 (MulNode SPR:$a, SPR:$b)))),
6655 class NVCVTIFPat<SDNode OpNode, NeonI Inst>
6656 : NEONFPPat<(f32 (OpNode GPR:$a)),
6663 class NVCVTFIPat<SDNode OpNode, NeonI Inst>
6664 : NEONFPPat<(i32 (OpNode SPR:$a)),