71 void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,  in printInst()  argument
73   unsigned Opcode = MI->getOpcode();  in printInst()
80     const MCOperand &Dst = MI->getOperand(0);  in printInst()
81     const MCOperand &MO1 = MI->getOperand(1);  in printInst()
82     const MCOperand &MO2 = MI->getOperand(2);  in printInst()
83     const MCOperand &MO3 = MI->getOperand(3);  in printInst()
86     printSBitModifierOperand(MI, 6, STI, O);  in printInst()
87     printPredicateOperand(MI, 4, STI, O);  in printInst()
103     const MCOperand &Dst = MI->getOperand(0);  in printInst()
104     const MCOperand &MO1 = MI->getOperand(1);  in printInst()
105     const MCOperand &MO2 = MI->getOperand(2);  in printInst()
108     printSBitModifierOperand(MI, 5, STI, O);  in printInst()
109     printPredicateOperand(MI, 3, STI, O);  in printInst()
130     if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) {  in printInst()
133       printPredicateOperand(MI, 2, STI, O);  in printInst()
137       printRegisterList(MI, 4, STI, O);  in printInst()
144     if (MI->getOperand(2).getReg() == ARM::SP &&  in printInst()
145         MI->getOperand(3).getImm() == -4) {  in printInst()
147       printPredicateOperand(MI, 4, STI, O);  in printInst()
149       printRegName(O, MI->getOperand(1).getReg());  in printInst()
159     if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) {  in printInst()
162       printPredicateOperand(MI, 2, STI, O);  in printInst()
166       printRegisterList(MI, 4, STI, O);  in printInst()
173     if (MI->getOperand(2).getReg() == ARM::SP &&  in printInst()
174         MI->getOperand(4).getImm() == 4) {  in printInst()
176       printPredicateOperand(MI, 5, STI, O);  in printInst()
178       printRegName(O, MI->getOperand(0).getReg());  in printInst()
188     if (MI->getOperand(0).getReg() == ARM::SP) {  in printInst()
190       printPredicateOperand(MI, 2, STI, O);  in printInst()
192       printRegisterList(MI, 4, STI, O);  in printInst()
201     if (MI->getOperand(0).getReg() == ARM::SP) {  in printInst()
203       printPredicateOperand(MI, 2, STI, O);  in printInst()
205       printRegisterList(MI, 4, STI, O);  in printInst()
213     unsigned BaseReg = MI->getOperand(0).getReg();  in printInst()
214     for (unsigned i = 3; i < MI->getNumOperands(); ++i) {  in printInst()
215       if (MI->getOperand(i).getReg() == BaseReg)  in printInst()
221     printPredicateOperand(MI, 1, STI, O);  in printInst()
227     printRegisterList(MI, 3, STI, O);  in printInst()
244     unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg();  in printInst()
251         NewMI.addOperand(MI->getOperand(0));  in printInst()
257       for (unsigned i = isStore ? 3 : 2; i < MI->getNumOperands(); ++i)  in printInst()
258         NewMI.addOperand(MI->getOperand(i));  in printInst()
266   if (!printAliasInstr(MI, STI, O))  in printInst()
267     printInstruction(MI, STI, O);  in printInst()
272 void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,  in printOperand()  argument
274   const MCOperand &Op = MI->getOperand(OpNo);  in printOperand()
312 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,  in printThumbLdrLabelOperand()  argument
315   const MCOperand &MO1 = MI->getOperand(OpNum);  in printThumbLdrLabelOperand()
342 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum,  in printSORegRegOperand()  argument
345   const MCOperand &MO1 = MI->getOperand(OpNum);  in printSORegRegOperand()
346   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printSORegRegOperand()
347   const MCOperand &MO3 = MI->getOperand(OpNum + 2);  in printSORegRegOperand()
362 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum,  in printSORegImmOperand()  argument
365   const MCOperand &MO1 = MI->getOperand(OpNum);  in printSORegImmOperand()
366   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printSORegImmOperand()
379 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,  in printAM2PreOrOffsetIndexOp()  argument
382   const MCOperand &MO1 = MI->getOperand(Op);  in printAM2PreOrOffsetIndexOp()
383   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAM2PreOrOffsetIndexOp()
384   const MCOperand &MO3 = MI->getOperand(Op + 2);  in printAM2PreOrOffsetIndexOp()
408 void ARMInstPrinter::printAddrModeTBB(const MCInst *MI, unsigned Op,  in printAddrModeTBB()  argument
411   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrModeTBB()
412   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAddrModeTBB()
420 void ARMInstPrinter::printAddrModeTBH(const MCInst *MI, unsigned Op,  in printAddrModeTBH()  argument
423   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrModeTBH()
424   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAddrModeTBH()
432 void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,  in printAddrMode2Operand()  argument
435   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrMode2Operand()
438     printOperand(MI, Op, STI, O);  in printAddrMode2Operand()
443   const MCOperand &MO3 = MI->getOperand(Op + 2);  in printAddrMode2Operand()
448   printAM2PreOrOffsetIndexOp(MI, Op, STI, O);  in printAddrMode2Operand()
451 void ARMInstPrinter::printAddrMode2OffsetOperand(const MCInst *MI,  in printAddrMode2OffsetOperand()  argument
455   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode2OffsetOperand()
456   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode2OffsetOperand()
477 void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,  in printAM3PreOrOffsetIndexOp()  argument
480   const MCOperand &MO1 = MI->getOperand(Op);  in printAM3PreOrOffsetIndexOp()
481   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAM3PreOrOffsetIndexOp()
482   const MCOperand &MO3 = MI->getOperand(Op + 2);  in printAM3PreOrOffsetIndexOp()
506 void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op,  in printAddrMode3Operand()  argument
509   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrMode3Operand()
511     printOperand(MI, Op, STI, O);  in printAddrMode3Operand()
515   assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) !=  in printAddrMode3Operand()
518   printAM3PreOrOffsetIndexOp(MI, Op, O, AlwaysPrintImm0);  in printAddrMode3Operand()
521 void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI,  in printAddrMode3OffsetOperand()  argument
525   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode3OffsetOperand()
526   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode3OffsetOperand()
540 void ARMInstPrinter::printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,  in printPostIdxImm8Operand()  argument
543   const MCOperand &MO = MI->getOperand(OpNum);  in printPostIdxImm8Operand()
549 void ARMInstPrinter::printPostIdxRegOperand(const MCInst *MI, unsigned OpNum,  in printPostIdxRegOperand()  argument
552   const MCOperand &MO1 = MI->getOperand(OpNum);  in printPostIdxRegOperand()
553   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printPostIdxRegOperand()
559 void ARMInstPrinter::printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum,  in printPostIdxImm8s4Operand()  argument
562   const MCOperand &MO = MI->getOperand(OpNum);  in printPostIdxImm8s4Operand()
568 void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum,  in printLdStmModeOperand()  argument
572       ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm());  in printLdStmModeOperand()
577 void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode5Operand()  argument
580   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode5Operand()
581   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode5Operand()
584     printOperand(MI, OpNum, STI, O);  in printAddrMode5Operand()
601 void ARMInstPrinter::printAddrMode5FP16Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode5FP16Operand()  argument
604   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode5FP16Operand()
605   const MCOperand &MO2 = MI->getOperand(OpNum+1);  in printAddrMode5FP16Operand()
608     printOperand(MI, OpNum, STI, O);  in printAddrMode5FP16Operand()
628 void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode6Operand()  argument
631   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode6Operand()
632   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode6Operand()
642 void ARMInstPrinter::printAddrMode7Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode7Operand()  argument
645   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode7Operand()
651 void ARMInstPrinter::printAddrMode6OffsetOperand(const MCInst *MI,  in printAddrMode6OffsetOperand()  argument
655   const MCOperand &MO = MI->getOperand(OpNum);  in printAddrMode6OffsetOperand()
664 void ARMInstPrinter::printBitfieldInvMaskImmOperand(const MCInst *MI,  in printBitfieldInvMaskImmOperand()  argument
668   const MCOperand &MO = MI->getOperand(OpNum);  in printBitfieldInvMaskImmOperand()
677 void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum,  in printMemBOption()  argument
680   unsigned val = MI->getOperand(OpNum).getImm();  in printMemBOption()
684 void ARMInstPrinter::printInstSyncBOption(const MCInst *MI, unsigned OpNum,  in printInstSyncBOption()  argument
687   unsigned val = MI->getOperand(OpNum).getImm();  in printInstSyncBOption()
691 void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum,  in printShiftImmOperand()  argument
694   unsigned ShiftOp = MI->getOperand(OpNum).getImm();  in printShiftImmOperand()
705 void ARMInstPrinter::printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum,  in printPKHLSLShiftImm()  argument
708   unsigned Imm = MI->getOperand(OpNum).getImm();  in printPKHLSLShiftImm()
715 void ARMInstPrinter::printPKHASRShiftImm(const MCInst *MI, unsigned OpNum,  in printPKHASRShiftImm()  argument
718   unsigned Imm = MI->getOperand(OpNum).getImm();  in printPKHASRShiftImm()
726 void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum,  in printRegisterList()  argument
730   for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {  in printRegisterList()
733     printRegName(O, MI->getOperand(i).getReg());  in printRegisterList()
738 void ARMInstPrinter::printGPRPairOperand(const MCInst *MI, unsigned OpNum,  in printGPRPairOperand()  argument
741   unsigned Reg = MI->getOperand(OpNum).getReg();  in printGPRPairOperand()
747 void ARMInstPrinter::printSetendOperand(const MCInst *MI, unsigned OpNum,  in printSetendOperand()  argument
750   const MCOperand &Op = MI->getOperand(OpNum);  in printSetendOperand()
757 void ARMInstPrinter::printCPSIMod(const MCInst *MI, unsigned OpNum,  in printCPSIMod()  argument
759   const MCOperand &Op = MI->getOperand(OpNum);  in printCPSIMod()
763 void ARMInstPrinter::printCPSIFlag(const MCInst *MI, unsigned OpNum,  in printCPSIFlag()  argument
765   const MCOperand &Op = MI->getOperand(OpNum);  in printCPSIFlag()
775 void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum,  in printMSRMaskOperand()  argument
778   const MCOperand &Op = MI->getOperand(OpNum);  in printMSRMaskOperand()
785     unsigned Opcode = MI->getOpcode();  in printMSRMaskOperand()
960 void ARMInstPrinter::printBankedRegOperand(const MCInst *MI, unsigned OpNum,  in printBankedRegOperand()  argument
963   uint32_t Banked = MI->getOperand(OpNum).getImm();  in printBankedRegOperand()
1012 void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum,  in printPredicateOperand()  argument
1015   ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();  in printPredicateOperand()
1023 void ARMInstPrinter::printMandatoryPredicateOperand(const MCInst *MI,  in printMandatoryPredicateOperand()  argument
1027   ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();  in printMandatoryPredicateOperand()
1031 void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum,  in printSBitModifierOperand()  argument
1034   if (MI->getOperand(OpNum).getReg()) {  in printSBitModifierOperand()
1035     assert(MI->getOperand(OpNum).getReg() == ARM::CPSR &&  in printSBitModifierOperand()
1041 void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum,  in printNoHashImmediate()  argument
1044   O << MI->getOperand(OpNum).getImm();  in printNoHashImmediate()
1047 void ARMInstPrinter::printPImmediate(const MCInst *MI, unsigned OpNum,  in printPImmediate()  argument
1050   O << "p" << MI->getOperand(OpNum).getImm();  in printPImmediate()
1053 void ARMInstPrinter::printCImmediate(const MCInst *MI, unsigned OpNum,  in printCImmediate()  argument
1056   O << "c" << MI->getOperand(OpNum).getImm();  in printCImmediate()
1059 void ARMInstPrinter::printCoprocOptionImm(const MCInst *MI, unsigned OpNum,  in printCoprocOptionImm()  argument
1062   O << "{" << MI->getOperand(OpNum).getImm() << "}";  in printCoprocOptionImm()
1065 void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum,  in printPCLabel()  argument
1071 void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum,  in printAdrLabelOperand()  argument
1074   const MCOperand &MO = MI->getOperand(OpNum);  in printAdrLabelOperand()
1093 void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum,  in printThumbS4ImmOperand()  argument
1096   O << markup("<imm:") << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4)  in printThumbS4ImmOperand()
1100 void ARMInstPrinter::printThumbSRImm(const MCInst *MI, unsigned OpNum,  in printThumbSRImm()  argument
1103   unsigned Imm = MI->getOperand(OpNum).getImm();  in printThumbSRImm()
1108 void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum,  in printThumbITMask()  argument
1112   unsigned Mask = MI->getOperand(OpNum).getImm();  in printThumbITMask()
1113   unsigned Firstcond = MI->getOperand(OpNum - 1).getImm();  in printThumbITMask()
1126 void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op,  in printThumbAddrModeRROperand()  argument
1129   const MCOperand &MO1 = MI->getOperand(Op);  in printThumbAddrModeRROperand()
1130   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printThumbAddrModeRROperand()
1133     printOperand(MI, Op, STI, O);  in printThumbAddrModeRROperand()
1146 void ARMInstPrinter::printThumbAddrModeImm5SOperand(const MCInst *MI,  in printThumbAddrModeImm5SOperand()  argument
1151   const MCOperand &MO1 = MI->getOperand(Op);  in printThumbAddrModeImm5SOperand()
1152   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printThumbAddrModeImm5SOperand()
1155     printOperand(MI, Op, STI, O);  in printThumbAddrModeImm5SOperand()
1168 void ARMInstPrinter::printThumbAddrModeImm5S1Operand(const MCInst *MI,  in printThumbAddrModeImm5S1Operand()  argument
1172   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 1);  in printThumbAddrModeImm5S1Operand()
1175 void ARMInstPrinter::printThumbAddrModeImm5S2Operand(const MCInst *MI,  in printThumbAddrModeImm5S2Operand()  argument
1179   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 2);  in printThumbAddrModeImm5S2Operand()
1182 void ARMInstPrinter::printThumbAddrModeImm5S4Operand(const MCInst *MI,  in printThumbAddrModeImm5S4Operand()  argument
1186   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4);  in printThumbAddrModeImm5S4Operand()
1189 void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op,  in printThumbAddrModeSPOperand()  argument
1192   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4);  in printThumbAddrModeSPOperand()
1199 void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum,  in printT2SOOperand()  argument
1202   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2SOOperand()
1203   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2SOOperand()
1215 void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,  in printAddrModeImm12Operand()  argument
1218   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrModeImm12Operand()
1219   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrModeImm12Operand()
1222     printOperand(MI, OpNum, STI, O);  in printAddrModeImm12Operand()
1243 void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI,  in printT2AddrModeImm8Operand()  argument
1247   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8Operand()
1248   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeImm8Operand()
1267 void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI,  in printT2AddrModeImm8s4Operand()  argument
1271   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8s4Operand()
1272   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeImm8s4Operand()
1275     printOperand(MI, OpNum, STI, O);  in printT2AddrModeImm8s4Operand()
1299     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printT2AddrModeImm0_1020s4Operand()  argument
1301   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm0_1020s4Operand()
1302   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeImm0_1020s4Operand()
1314     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printT2AddrModeImm8OffsetOperand()  argument
1316   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8OffsetOperand()
1329     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printT2AddrModeImm8s4OffsetOperand()  argument
1331   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8s4OffsetOperand()
1346 void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI,  in printT2AddrModeSoRegOperand()  argument
1350   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeSoRegOperand()
1351   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeSoRegOperand()
1352   const MCOperand &MO3 = MI->getOperand(OpNum + 2);  in printT2AddrModeSoRegOperand()
1369 void ARMInstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum,  in printFPImmOperand()  argument
1372   const MCOperand &MO = MI->getOperand(OpNum);  in printFPImmOperand()
1377 void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum,  in printNEONModImmOperand()  argument
1380   unsigned EncodedImm = MI->getOperand(OpNum).getImm();  in printNEONModImmOperand()
1388 void ARMInstPrinter::printImmPlusOneOperand(const MCInst *MI, unsigned OpNum,  in printImmPlusOneOperand()  argument
1391   unsigned Imm = MI->getOperand(OpNum).getImm();  in printImmPlusOneOperand()
1395 void ARMInstPrinter::printRotImmOperand(const MCInst *MI, unsigned OpNum,  in printRotImmOperand()  argument
1398   unsigned Imm = MI->getOperand(OpNum).getImm();  in printRotImmOperand()
1405 void ARMInstPrinter::printModImmOperand(const MCInst *MI, unsigned OpNum,  in printModImmOperand()  argument
1408   MCOperand Op = MI->getOperand(OpNum);  in printModImmOperand()
1412     return printOperand(MI, OpNum, STI, O);  in printModImmOperand()
1418   switch (MI->getOpcode()) {  in printModImmOperand()
1421     PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC);  in printModImmOperand()
1446 void ARMInstPrinter::printFBits16(const MCInst *MI, unsigned OpNum,  in printFBits16()  argument
1448   O << markup("<imm:") << "#" << 16 - MI->getOperand(OpNum).getImm()  in printFBits16()
1452 void ARMInstPrinter::printFBits32(const MCInst *MI, unsigned OpNum,  in printFBits32()  argument
1454   O << markup("<imm:") << "#" << 32 - MI->getOperand(OpNum).getImm()  in printFBits32()
1458 void ARMInstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,  in printVectorIndex()  argument
1461   O << "[" << MI->getOperand(OpNum).getImm() << "]";  in printVectorIndex()
1464 void ARMInstPrinter::printVectorListOne(const MCInst *MI, unsigned OpNum,  in printVectorListOne()  argument
1468   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListOne()
1472 void ARMInstPrinter::printVectorListTwo(const MCInst *MI, unsigned OpNum,  in printVectorListTwo()  argument
1475   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwo()
1485 void ARMInstPrinter::printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum,  in printVectorListTwoSpaced()  argument
1488   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwoSpaced()
1498 void ARMInstPrinter::printVectorListThree(const MCInst *MI, unsigned OpNum,  in printVectorListThree()  argument
1505   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThree()
1507   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListThree()
1509   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThree()
1513 void ARMInstPrinter::printVectorListFour(const MCInst *MI, unsigned OpNum,  in printVectorListFour()  argument
1520   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFour()
1522   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListFour()
1524   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFour()
1526   printRegName(O, MI->getOperand(OpNum).getReg() + 3);  in printVectorListFour()
1530 void ARMInstPrinter::printVectorListOneAllLanes(const MCInst *MI,  in printVectorListOneAllLanes()  argument
1535   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListOneAllLanes()
1539 void ARMInstPrinter::printVectorListTwoAllLanes(const MCInst *MI,  in printVectorListTwoAllLanes()  argument
1543   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwoAllLanes()
1553 void ARMInstPrinter::printVectorListThreeAllLanes(const MCInst *MI,  in printVectorListThreeAllLanes()  argument
1561   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThreeAllLanes()
1563   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListThreeAllLanes()
1565   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThreeAllLanes()
1569 void ARMInstPrinter::printVectorListFourAllLanes(const MCInst *MI,  in printVectorListFourAllLanes()  argument
1577   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFourAllLanes()
1579   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListFourAllLanes()
1581   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFourAllLanes()
1583   printRegName(O, MI->getOperand(OpNum).getReg() + 3);  in printVectorListFourAllLanes()
1588     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printVectorListTwoSpacedAllLanes()  argument
1590   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwoSpacedAllLanes()
1601     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printVectorListThreeSpacedAllLanes()  argument
1607   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThreeSpacedAllLanes()
1609   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThreeSpacedAllLanes()
1611   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListThreeSpacedAllLanes()
1616     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printVectorListFourSpacedAllLanes()  argument
1622   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFourSpacedAllLanes()
1624   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFourSpacedAllLanes()
1626   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListFourSpacedAllLanes()
1628   printRegName(O, MI->getOperand(OpNum).getReg() + 6);  in printVectorListFourSpacedAllLanes()
1632 void ARMInstPrinter::printVectorListThreeSpaced(const MCInst *MI,  in printVectorListThreeSpaced()  argument
1640   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThreeSpaced()
1642   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThreeSpaced()
1644   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListThreeSpaced()
1648 void ARMInstPrinter::printVectorListFourSpaced(const MCInst *MI, unsigned OpNum,  in printVectorListFourSpaced()  argument
1655   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFourSpaced()
1657   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFourSpaced()
1659   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListFourSpaced()
1661   printRegName(O, MI->getOperand(OpNum).getReg() + 6);  in printVectorListFourSpaced()