194     ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm();  in getLdStmModeOpValue()
294     unsigned SoImm = MO.getImm();  in getSOImmOpValue()
322     return MO.getImm();  in getModImmOpValue()
329     unsigned SoImm = MI.getOperand(Op).getImm();  in getT2SOImmOpValue()
359     return 64 - MI.getOperand(Op).getImm();  in getNEONVcvtImm32OpValue()
540     return static_cast<unsigned>(MO.getImm());  in getMachineOpValue()
559   int32_t SImm = MO1.getImm();  in EncodeAddrModeOpValues()
587   if (MO.isImm()) return MO.getImm();  in getBranchTargetOpValue()
625   return encodeThumbBLOffset(MO.getImm());  in getThumbBLTargetOpValue()
638   return encodeThumbBLOffset(MO.getImm());  in getThumbBLXTargetOpValue()
650   return (MO.getImm() >> 1);  in getThumbBRTargetOpValue()
662   return (MO.getImm() >> 1);  in getThumbBCCTargetOpValue()
673   return (MO.getImm() >> 1);  in getThumbCBTargetOpValue()
685         if (ARMCC::CondCodes(MCOp1.getImm()) != ARMCC::AL)  in HasConditionalBranch()
722   return MO.getImm() >> 2;  in getARMBranchTargetOpValue()
737   return MO.getImm() >> 2;  in getARMBLTargetOpValue()
748   return MO.getImm() >> 1;  in getARMBLXTargetOpValue()
762     Val = MO.getImm() >> 1;  in getThumbBranchTargetOpValue()
790   int64_t offset = MO.getImm();  in getAdrLabelOpValue()
831   int32_t Val = MO.getImm();  in getT2AdrLabelOpValue()
851   return MO.getImm();  in getThumbAdrLabelOpValue()
900       int32_t Offset = MO.getImm();  in getAddrModeImm12OpValue()
936   int32_t Imm8 = MI.getOperand(OpIdx).getImm();  in getT2Imm8s4OpValue()
1005   unsigned Imm8 = MO1.getImm();  in getT2AddrModeImm0_1020s4OpValue()
1018     return static_cast<unsigned>(MO.getImm());  in getHiLo16ImmOpValue()
1074   unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm());  in getLdStSORegOpValue()
1075   bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add;  in getLdStSORegOpValue()
1076   ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm());  in getLdStSORegOpValue()
1108   unsigned Imm = MO1.getImm();  in getAddrMode2OffsetOpValue()
1130   bool isAdd = MO1.getImm() != 0;  in getPostIdxRegOpValue()
1144   unsigned Imm = MO1.getImm();  in getAddrMode3OffsetOpValue()
1180   unsigned Imm = MO2.getImm();  in getAddrMode3OpValue()
1203   return MO1.getImm() & 0xff;  in getAddrModeThumbSPOpValue()
1217   unsigned Imm5 = MO1.getImm();  in getAddrModeISOpValue()
1229   return (MO.getImm() >> 2);  in getAddrModePCOpValue()
1329   ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(MO2.getImm());  in getSORegRegOpValue()
1356   assert(ARM_AM::getSORegOffset(MO2.getImm()) == 0);  in getSORegRegOpValue()
1374   ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(MO1.getImm());  in getSORegImmOpValue()
1401   unsigned Offset = ARM_AM::getSORegOffset(MO1.getImm());  in getSORegImmOpValue()
1421   Value |= MO3.getImm();  in getT2AddrModeSORegOpValue()
1439   int32_t tmp = (int32_t)MO2.getImm();  in getT2AddrModeImm8OpValue()
1456   int32_t tmp = (int32_t)MO1.getImm();  in getT2AddrModeImm8OffsetOpValue()
1479   ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(MO1.getImm());  in getT2SORegOpValue()
1505   return Binary | ARM_AM::getSORegOffset(MO1.getImm()) << 7;  in getT2SORegOpValue()
1515   uint32_t v = ~MO.getImm();  in getBitfieldInvertedMaskOpValue()
1569   switch (Imm.getImm()) {  in getAddrMode6AddressOpValue()
1593   switch (Imm.getImm()) {  in getAddrMode6OneLane32AddressOpValue()
1620   switch (Imm.getImm()) {  in getAddrMode6DupAddressOpValue()
1644   return 8 - MI.getOperand(Op).getImm();  in getShiftRight8Imm()
1651   return 16 - MI.getOperand(Op).getImm();  in getShiftRight16Imm()
1658   return 32 - MI.getOperand(Op).getImm();  in getShiftRight32Imm()
1665   return 64 - MI.getOperand(Op).getImm();  in getShiftRight64Imm()