1139       unsigned Src1Reg = MI.getOperand(1).getReg();  in expandPostRAPseudo()  local
1141       unsigned Src1SubHi = HRI.getSubReg(Src1Reg, Hexagon::subreg_hireg);  in expandPostRAPseudo()
1142       unsigned Src1SubLo = HRI.getSubReg(Src1Reg, Hexagon::subreg_loreg);  in expandPostRAPseudo()
1163       unsigned Src1Reg = MI.getOperand(1).getReg();  in expandPostRAPseudo()  local
1166       unsigned Src1SubHi = HRI.getSubReg(Src1Reg, Hexagon::subreg_hireg);  in expandPostRAPseudo()
1167       unsigned Src1SubLo = HRI.getSubReg(Src1Reg, Hexagon::subreg_loreg);  in expandPostRAPseudo()
1193       unsigned Src1Reg = MI.getOperand(1).getReg();  in expandPostRAPseudo()  local
1206           .addReg(Src1Reg, Src1RegIsKill)  in expandPostRAPseudo()
3304   unsigned DstReg, SrcReg, Src1Reg, Src2Reg;  in getCompoundCandidateGroup()  local
3319     Src1Reg = MI->getOperand(1).getReg();  in getCompoundCandidateGroup()
3323         isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg))  in getCompoundCandidateGroup()
3356     Src1Reg = MI->getOperand(1).getReg();  in getCompoundCandidateGroup()
3360         isIntRegForSubInst(Src1Reg) && (MI->getOperand(2).getImm() == 0))  in getCompoundCandidateGroup()
3371     Src1Reg = MI->getOperand(0).getReg();  in getCompoundCandidateGroup()
3372     if (Hexagon::PredRegsRegClass.contains(Src1Reg) &&  in getCompoundCandidateGroup()
3373         (Hexagon::P0 == Src1Reg || Hexagon::P1 == Src1Reg))  in getCompoundCandidateGroup()
3638   unsigned DstReg, SrcReg, Src1Reg, Src2Reg;  in getDuplexCandidateGroup()  local
3762     Src1Reg = MI->getOperand(0).getReg();  in getDuplexCandidateGroup()
3764     if (Hexagon::IntRegsRegClass.contains(Src1Reg) &&  in getDuplexCandidateGroup()
3766         HRI.getStackRegister() == Src1Reg && MI->getOperand(1).isImm() &&  in getDuplexCandidateGroup()
3770     if (isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg) &&  in getDuplexCandidateGroup()
3777     Src1Reg = MI->getOperand(0).getReg();  in getDuplexCandidateGroup()
3779     if (isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg) &&  in getDuplexCandidateGroup()
3794     Src1Reg = MI->getOperand(0).getReg();  in getDuplexCandidateGroup()
3796     if (isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg) &&  in getDuplexCandidateGroup()
3803     Src1Reg = MI->getOperand(0).getReg();  in getDuplexCandidateGroup()
3806         Hexagon::IntRegsRegClass.contains(Src1Reg) &&  in getDuplexCandidateGroup()
3807         HRI.getStackRegister() == Src1Reg && MI->getOperand(1).isImm() &&  in getDuplexCandidateGroup()
3813     Src1Reg = MI->getOperand(0).getReg();  in getDuplexCandidateGroup()
3814     if (isIntRegForSubInst(Src1Reg) && MI->getOperand(1).isImm() &&  in getDuplexCandidateGroup()
3821     Src1Reg = MI->getOperand(0).getReg();  in getDuplexCandidateGroup()
3822     if (isIntRegForSubInst(Src1Reg) &&  in getDuplexCandidateGroup()
3874     Src1Reg = MI->getOperand(1).getReg();  in getDuplexCandidateGroup()
3876     if (isIntRegForSubInst(DstReg) && (DstReg == Src1Reg) &&  in getDuplexCandidateGroup()