Lines Matching refs:Rdd

330 def A2_combineii: ALU32Inst <(outs DoubleRegs:$Rdd), (ins s8Ext:$s8, s8Imm:$S8),
331 "$Rdd = combine(#$s8, #$S8)",
332 [(set (i64 DoubleRegs:$Rdd),
334 bits<5> Rdd;
343 let Inst{4-0} = Rdd;
856 : ALU64_rr < (outs DoubleRegs:$Rdd),
858 "$Rdd = "#opc#"($Rss, $Rtt)"#!if(isRnd, ":rnd", "")
862 bits<5> Rdd;
873 let Inst{4-0} = Rdd;
877 // Rdd=vadd[u][bhw](Rss,Rtt)
884 // Rdd=vadd[u][bhw](Rss,Rtt):sat
893 // Rdd=vavg[u][bhw](Rss,Rtt)
902 // Rdd=vavg[u][bhw](Rss,Rtt)[:rnd|:crnd]
912 // Rdd=vnavg[bh](Rss,Rtt)
918 // Rdd=vnavg[bh](Rss,Rtt)[:rnd|:crnd]:sat
926 // Rdd=vsub[u][bh](Rss,Rtt)
933 // Rdd=vsub[u][bh](Rss,Rtt):sat
941 // Rdd=vmax[u][bhw](Rss,Rtt)
949 // Rdd=vmin[u][bhw](Rss,Rtt)
1941 // Rdd=memb[u]h(Rx++#s4:2)
2560 : MInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss, DoubleRegs:$Rtt),
2561 "$Rdd = "#opc#"($Rss, $Rtt)"#!if(hasShift,":<<1","")
2565 bits<5> Rdd;
2574 let Inst{4-0} = Rdd;
2579 // Vector complex multiply imaginary: Rdd=vcmpyi(Rss,Rtt)[:<<1]:sat
2584 // Vector complex multiply real: Rdd=vcmpyr(Rss,Rtt)[:<<1]:sat
2588 // Vector dual multiply: Rdd=vdmpy(Rss,Rtt)[:<<1]:sat
2592 // Vector multiply even halfwords: Rdd=vmpyeh(Rss,Rtt)[:<<1]:sat
2596 //Rdd=vmpywoh(Rss,Rtt)[:<<1][:rnd]:sat
2602 //Rdd=vmpyweh(Rss,Rtt)[:<<1][:rnd]:sat
2608 //Rdd=vmpywouh(Rss,Rtt)[:<<1][:rnd]:sat
2614 //Rdd=vmpyweuh(Rss,Rtt)[:<<1][:rnd]:sat
2846 : MInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss, DoubleRegs:$Rtt),
2847 "$Rdd = "#opc#"($Rss, $Rtt"#!if(isConj,"*)",")"),
2849 bits<5> Rdd;
2858 let Inst{4-0} = Rdd;
2864 : MInst <(outs DoubleRegs:$Rdd),
2866 "$Rdd += "#opc#"($Rss, $Rtt"#!if(isConj,"*)",")"),
2867 [], "$dst2 = $Rdd",M_tc_3x_SLOT23 > {
2868 bits<5> Rdd;
2877 let Inst{4-0} = Rdd;
2883 : MInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rtt, DoubleRegs:$Rss),
2884 "$Rdd = "#opc#"($Rtt, $Rss)",
2886 bits<5> Rdd;
2895 let Inst{4-0} = Rdd;
2904 // Vector sum of absolute differences unsigned bytes: Rdd=vrsadub(Rss,Rtt)
2908 // Vector absolute difference: Rdd=vabsdiffh(Rtt,Rss)
2911 // Vector absolute difference words: Rdd=vabsdiffw(Rtt,Rss)
2915 // Rdd[+]=vrcmpy[ir](Rss,Rtt[*])
2927 // Rdd[+]=vrmpyh(Rss,Rtt)
3023 : MInst < (outs DoubleRegs:$Rdd), (ins IntRegs:$Rs, IntRegs:$Rt),
3024 "$Rdd = "#!if(isUnsigned,"mpyu","mpy")#"($Rs."#!if(LHbits{1},"h","l")
3029 bits<5> Rdd;
3040 let Inst{4-0} = Rdd;
3065 //Rdd=mpyu(Rs.[HL],Rt.[HL])[:<<1]
3085 : MInst <(outs DoubleRegs:$Rdd),
3087 "$Rdd = "#mnemonic#"($Rs, $Rt"#!if(isConj,"*)",")")
3091 bits<5> Rdd;
3102 let Inst{4-0} = Rdd;
3135 // Rdd = mpy[u](Rs,Rt)
3155 // Rdd=cmpy(Rs,Rt)[:<<]:sat
3159 // Rdd=cmpy(Rs,Rt*)[:<<]:sat
3176 // Rdd=vmpyh(Rs,Rt)[:<<]:sat
4069 : SInst<(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss),
4070 "$Rdd = "#opc#"($Rss)"#!if(!eq(sat, 1),":sat","")> {
4072 bits<5> Rdd;
4078 let Inst{4-0} = Rdd;
4897 // Map from Rdd = sign_extend_inreg(Rss, i32) -> Rdd = A2_sxtw(Rss.lo).
4901 // Map from Rdd = sign_extend_inreg(Rss, i16) -> Rdd = A2_sxtw(A2_sxth(Rss.lo)).
4905 // Map from Rdd = sign_extend_inreg(Rss, i8) -> Rdd = A2_sxtw(A2_sxtb(Rss.lo)).
5046 // Map from Rss = Pd to Rdd = sxtw (mux(Pd, #1, #0))
5332 : SInst < (outs DoubleRegs:$Rdd),
5334 "$Rdd = "#mnemonic#"($Rss, $Rtt, $Pu)",
5336 bits<5> Rdd;
5348 let Inst{4-0} = Rdd;
5402 // Rdd=[asr|lsr|asl|lsl](Rss,Rt)
5454 : SInst <(outs DoubleRegs:$Rdd),
5456 "$Rdd = "#mnemonic#"($Rss, $Rtt, #$u3)" ,
5458 bits<5> Rdd;
5470 let Inst{4-0} = Rdd;
5623 // Rdd=extractu(Rss,Rtt)
5624 // Rdd=extractu(Rss,#u6,#U6)