Lines Matching refs:Rxx

2486 //Rxx [-+]= mpy[u](Rs.[H|L],Rt.[H|L])[:<<1][:sat]
2490   : MInst_acc<(outs DoubleRegs:$Rxx),
2492   "$Rxx "#!if(isNac,"-= ","+= ")#!if(isUnsigned,"mpyu","mpy")
2496   [], "$dst2 = $Rxx", M_tc_3x_SLOT23 > {
2497     bits<5> Rxx;
2509     let Inst{4-0} = Rxx;
2938   : MInst <(outs DoubleRegs:$Rxx),
2940   "$Rxx += "#opc#"($Rss, $Rtt)"#!if(hasShift,":<<1","")
2942   [], "$dst2 = $Rxx",M_tc_3x_SLOT23 > {
2943     bits<5> Rxx;
2952     let Inst{4-0} = Rxx;
2959   : MInst <(outs DoubleRegs:$Rxx),
2961   "$Rxx += "#opc#"($Rss, $Rtt)"#!if(hasShift,":<<1","")
2963   [], "$dst2 = $Rxx",M_tc_3x_SLOT23 > {
2964     bits<5> Rxx;
2973     let Inst{4-0} = Rxx;
2979 // Rxx+=vmpyw[eo]h(Rss,Rtt)[:<<1][:rnd]:sat
2991 // Rxx+=vmpyw[eo]uh(Rss,Rtt)[:<<1][:rnd]:sat
3003 // Rxx+=vmpyeh(Rss,Rtt)[:<<1][:sat]
3009 // Rxx+=vdmpy(Rss,Rtt)[:sat]
3014 // Rxx+=vcmpy[ir](Rss,Rtt):sat
3113   : MInst <(outs DoubleRegs:$Rxx),
3115   "$Rxx "#op2#"= "#op1#"($Rs, $Rt"#!if(isConj,"*)",")")
3119   [] , "$dst2 = $Rxx" > {
3120     bits<5> Rxx;
3131     let Inst{4-0} = Rxx;
3139 // Rxx[+-]= mpy[u](Rs,Rt)
3146 // Rxx=cmpy[ir](Rs,Rt)
3150 // Rxx+=cmpy[ir](Rs,Rt)
3163 // Rxx[-+]=cmpy(Rs,Rt)[:<<1]:sat
3169 // Rxx[-+]=cmpy(Rs,Rt*)[:<<1]:sat
3182 // Rxx+=vmpyh(Rs,Rt)[:<<1][:sat]
3200 // Rxx[+-]=mpy(Rs,Rt)
5169 // Rxx[+-&|]=asr(Rss,#u6)
5170 // Rxx[+-&|^]=lsr(Rss,#u6)
5171 // Rxx[+-&|^]=asl(Rss,#u6)
5175   : SInst_acc<(outs DoubleRegs:$Rxx),
5177   "$Rxx "#opc2#opc1#"($Rss, #$u6)",
5178   [(set (i64 DoubleRegs:$Rxx),
5181   "$src1 = $Rxx", S_2op_tc_2_SLOT23> {
5182     bits<5> Rxx;
5192     let Inst{4-0} = Rxx;
5198 // Rxx[+-&|]=asr(Rss,Rt)
5199 // Rxx[+-&|^]=lsr(Rss,Rt)
5200 // Rxx[+-&|^]=asl(Rss,Rt)
5201 // Rxx[+-&|^]=lsl(Rss,Rt)
5205   : SInst_acc<(outs DoubleRegs:$Rxx),
5207   "$Rxx "#opc2#opc1#"($Rss, $Rt)",
5208   [(set (i64 DoubleRegs:$Rxx),
5211   "$src1 = $Rxx", S_3op_tc_2_SLOT23> {
5212     bits<5> Rxx;
5223     let Inst{4-0} = Rxx;
5534 // Rxx=insert(Rss,Rtt)
5535 // Rxx=insert(Rss,#u6,#U6)