Lines Matching refs:ArePtrs64bit

1112   const bool ArePtrs64bit = ABI.ArePtrs64bit();  in emitAtomicBinary()  local
1122 ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicBinary()
1123 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in emitAtomicBinary()
1125 ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicBinary()
1126 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in emitAtomicBinary()
1235 const bool ArePtrs64bit = ABI.ArePtrs64bit(); in emitAtomicBinaryPartword() local
1237 getRegClassFor(ArePtrs64bit ? MVT::i64 : MVT::i32); in emitAtomicBinaryPartword()
1268 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicBinaryPartword()
1269 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in emitAtomicBinaryPartword()
1270 SC = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicBinaryPartword()
1271 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in emitAtomicBinaryPartword()
1310 .addReg(Ptr, 0, ArePtrs64bit ? Mips::sub_32 : 0).addImm(3); in emitAtomicBinaryPartword()
1400 const bool ArePtrs64bit = ABI.ArePtrs64bit(); in emitAtomicCmpSwap() local
1410 ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicCmpSwap()
1411 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in emitAtomicCmpSwap()
1413 ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicCmpSwap()
1414 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in emitAtomicCmpSwap()
1489 const bool ArePtrs64bit = ABI.ArePtrs64bit(); in emitAtomicCmpSwapPartword() local
1491 getRegClassFor(ArePtrs64bit ? MVT::i64 : MVT::i32); in emitAtomicCmpSwapPartword()
1523 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicCmpSwapPartword()
1524 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in emitAtomicCmpSwapPartword()
1525 SC = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicCmpSwapPartword()
1526 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in emitAtomicCmpSwapPartword()
1568 BuildMI(BB, DL, TII->get(ArePtrs64bit ? Mips::DADDiu : Mips::ADDiu), MaskLSB2) in emitAtomicCmpSwapPartword()
1570 BuildMI(BB, DL, TII->get(ArePtrs64bit ? Mips::AND64 : Mips::AND), AlignedAddr) in emitAtomicCmpSwapPartword()
1573 .addReg(Ptr, 0, ArePtrs64bit ? Mips::sub_32 : 0).addImm(3); in emitAtomicCmpSwapPartword()