Lines Matching refs:MemKind
98 unsigned MemKind : 4; member
165 createMem(MemoryKind MemKind, RegisterKind RegKind, unsigned Base, in createMem() argument
169 Op->Mem.MemKind = MemKind; in createMem()
234 bool isMem(MemoryKind MemKind) const { in isMem()
236 (Mem.MemKind == MemKind || in isMem()
239 (Mem.MemKind == BDMem && MemKind == BDXMem))); in isMem()
241 bool isMem(MemoryKind MemKind, RegisterKind RegKind) const { in isMem() argument
242 return isMem(MemKind) && Mem.RegKind == RegKind; in isMem()
244 bool isMemDisp12(MemoryKind MemKind, RegisterKind RegKind) const { in isMemDisp12() argument
245 return isMem(MemKind, RegKind) && inRange(Mem.Disp, 0, 0xfff); in isMemDisp12()
247 bool isMemDisp20(MemoryKind MemKind, RegisterKind RegKind) const { in isMemDisp20() argument
248 return isMem(MemKind, RegKind) && inRange(Mem.Disp, -524288, 524287); in isMemDisp20()
379 MemoryKind MemKind, const unsigned *Regs,
640 SystemZAsmParser::parseAddress(OperandVector &Operands, MemoryKind MemKind, in parseAddress() argument
650 if (IsVector && MemKind != BDVMem) { in parseAddress()
655 if (!IsVector && MemKind == BDVMem) { in parseAddress()
660 if (Index && MemKind != BDXMem && MemKind != BDVMem) { in parseAddress()
665 if (Length && MemKind != BDLMem) { in parseAddress()
670 if (!Length && MemKind == BDLMem) { in parseAddress()
677 Operands.push_back(SystemZOperand::createMem(MemKind, RegKind, Base, Disp, in parseAddress()