Lines Matching refs:LoReg
2137 unsigned LoReg; in Select() local
2140 case MVT::i8: LoReg = X86::AL; Opc = X86::MUL8r; break; in Select()
2141 case MVT::i16: LoReg = X86::AX; Opc = X86::MUL16r; break; in Select()
2142 case MVT::i32: LoReg = X86::EAX; Opc = X86::MUL32r; break; in Select()
2143 case MVT::i64: LoReg = X86::RAX; Opc = X86::MUL64r; break; in Select()
2146 SDValue InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, LoReg, in Select()
2184 unsigned SrcReg, LoReg, HiReg; in Select() local
2189 SrcReg = LoReg = X86::AL; HiReg = X86::AH; in Select()
2193 SrcReg = LoReg = X86::AX; HiReg = X86::DX; in Select()
2197 SrcReg = LoReg = X86::EAX; HiReg = X86::EDX; in Select()
2201 SrcReg = LoReg = X86::RAX; HiReg = X86::RDX; in Select()
2204 SrcReg = X86::EDX; LoReg = HiReg = 0; in Select()
2207 SrcReg = X86::RDX; LoReg = HiReg = 0; in Select()
2291 assert(LoReg && "Register for low half is not defined!"); in Select()
2292 ResLo = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, LoReg, NVT, in Select()
2341 unsigned LoReg, HiReg, ClrReg; in Select() local
2346 LoReg = X86::AL; ClrReg = HiReg = X86::AH; in Select()
2350 LoReg = X86::AX; HiReg = X86::DX; in Select()
2355 LoReg = X86::EAX; ClrReg = HiReg = X86::EDX; in Select()
2359 LoReg = X86::RAX; ClrReg = HiReg = X86::RDX; in Select()
2390 LoReg, N0, SDValue()).getValue(1); in Select()
2482 LoReg, NVT, InFlag); in Select()