Lines Matching refs:TMP1

44 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinit…
45 ; CHECK-NEXT:    ret <4 x float> [[TMP1]]
53 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 0, …
54 ; CHECK-NEXT:    ret <8 x float> [[TMP1]]
62 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroin…
63 ; CHECK-NEXT:    ret <2 x double> [[TMP1]]
71 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 0…
72 ; CHECK-NEXT:    ret <4 x double> [[TMP1]]
82 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, …
83 ; CHECK-NEXT:    ret <4 x float> [[TMP1]]
91 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 3, …
92 ; CHECK-NEXT:    ret <8 x float> [[TMP1]]
100 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1…
101 ; CHECK-NEXT:    ret <2 x double> [[TMP1]]
109 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 1…
110 ; CHECK-NEXT:    ret <4 x double> [[TMP1]]
120 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 und…
121 ; CHECK-NEXT:    ret <4 x float> [[TMP1]]
129 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 und…
130 ; CHECK-NEXT:    ret <8 x float> [[TMP1]]
138 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 u…
139 ; CHECK-NEXT:    ret <2 x double> [[TMP1]]
147 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 u…
148 ; CHECK-NEXT:    ret <4 x double> [[TMP1]]