Lines Matching refs:TMP1

10 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %…
11 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
35 ; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 8, i8 15)
36 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
64 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 8, i8 2…
65 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
73 ; CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> %x to <16 x i8>
74 ; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> <i8 undef, i8 undef, i8…
84 ; CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> %x to <16 x i8>
85 ; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> <i8 undef, i8 0, i8 0, …
131 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64>…
132 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
140 ; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> <i6…
141 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
169 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <16 x i8> %v, <16 x i8> %i, <16 x i32> <i32 0, i32 1,…
170 ; CHECK-NEXT:    ret <16 x i8> [[TMP1]]
181 ; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <16 x i8> %v, <16 x i8> %i, <16 x i32> <i32 16, i32 1…
182 ; CHECK-NEXT:    ret <16 x i8> [[TMP1]]
248 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %…
249 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
258 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %…
259 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
268 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %…
269 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
288 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2)
289 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
307 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64>…
308 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
326 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64…
327 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
336 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64…
337 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]
346 ; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64…
347 ; CHECK-NEXT:    ret <2 x i64> [[TMP1]]