Lines Matching refs:addsub
131 x86_avx_addsub_pd_256, // llvm.x86.avx.addsub.pd.256
132 x86_avx_addsub_ps_256, // llvm.x86.avx.addsub.ps.256
390 x86_sse3_addsub_pd, // llvm.x86.sse3.addsub.pd
391 x86_sse3_addsub_ps, // llvm.x86.sse3.addsub.ps
658 "llvm.x86.avx.addsub.pd.256",
659 "llvm.x86.avx.addsub.ps.256",
917 "llvm.x86.sse3.addsub.pd",
918 "llvm.x86.sse3.addsub.ps",
4033 if (NameR.substr(7, 9) != ".addsub.p")
4038 return Intrinsic::x86_sse3_addsub_pd; // "86.sse3.addsub.pd"
4040 return Intrinsic::x86_sse3_addsub_ps; // "86.sse3.addsub.ps"
4642 return Intrinsic::x86_avx_addsub_pd_256; // "86.avx.addsub.pd.256"
4646 return Intrinsic::x86_avx_addsub_ps_256; // "86.avx.addsub.ps.256"
5818 case Intrinsic::x86_sse3_addsub_pd: // llvm.x86.sse3.addsub.pd
5933 case Intrinsic::x86_sse3_addsub_ps: // llvm.x86.sse3.addsub.ps
5997 case Intrinsic::x86_avx_addsub_pd_256: // llvm.x86.avx.addsub.pd.256
6091 case Intrinsic::x86_avx_addsub_ps_256: // llvm.x86.avx.addsub.ps.256
6989 case Intrinsic::x86_sse3_addsub_pd: // llvm.x86.sse3.addsub.pd
7153 case Intrinsic::x86_sse3_addsub_ps: // llvm.x86.sse3.addsub.ps
7248 case Intrinsic::x86_avx_addsub_pd_256: // llvm.x86.avx.addsub.pd.256
7381 case Intrinsic::x86_avx_addsub_ps_256: // llvm.x86.avx.addsub.ps.256