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Lines Matching refs:skge_write32

146 				skge_write32(hw, SK_REG(port, TX_LED_VAL), 0);  in skge_led()
150 skge_write32(hw, SK_REG(port, RX_LED_VAL), 0); in skge_led()
165 skge_write32(hw, SK_REG(port, RX_LED_VAL), 100); in skge_led()
172 skge_write32(hw, SK_REG(port, TX_LED_VAL), 100); in skge_led()
485 skge_write32(hw, B2_BSC_INI, (SK_BLK_DUR * SK_FACT_53) / 100); in genesis_init()
889 skge_write32(hw, B2_GP_IO, r); in genesis_mac_init()
1036 skge_write32(hw, B2_GP_IO, reg); in genesis_stop()
1324 skge_write32(hw, B2_FAR, reg); in is_yukon_lite_a0()
1340 skge_write32(hw, B2_GP_IO, reg); in yukon_mac_init()
1344 skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in yukon_mac_init()
1345 skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); in yukon_mac_init()
1353 skge_write32(hw, B2_GP_IO, reg); in yukon_mac_init()
1362 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET); in yukon_mac_init()
1363 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR); in yukon_mac_init()
1364 skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR); in yukon_mac_init()
1392 skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in yukon_mac_init()
1655 skge_write32(hw, RB_ADDR(q, RB_START), start); in skge_ramset()
1656 skge_write32(hw, RB_ADDR(q, RB_WP), start); in skge_ramset()
1657 skge_write32(hw, RB_ADDR(q, RB_RP), start); in skge_ramset()
1658 skge_write32(hw, RB_ADDR(q, RB_END), end); in skge_ramset()
1662 skge_write32(hw, RB_ADDR(q, RB_RX_UTPP), in skge_ramset()
1664 skge_write32(hw, RB_ADDR(q, RB_RX_LTPP), in skge_ramset()
1688 skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); in skge_qset()
1689 skge_write32(hw, Q_ADDR(q, Q_F), watermark); in skge_qset()
1690 skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32)); in skge_qset()
1691 skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base); in skge_qset()
1772 skge_write32(hw, B0_IMSK, hw->intr_mask); in skge_up()
1787 skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL), in skge_rx_stop()
1789 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_rx_stop()
1809 skge_write32(hw, B0_IMSK, hw->intr_mask); in skge_down()
1819 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), in skge_down()
1828 skge_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); in skge_down()
1829 skge_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); in skge_down()
1832 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down()
1833 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); in skge_down()
2101 skge_write32(hw, B0_IMSK, hw->intr_mask); in skge_phyirq()
2274 skge_write32(hw, B0_HWE_IMSK, IS_ERR_MSK); in skge_reset()
2279 skge_write32(hw, B2_IRQM_MSK, IS_XA1_F|IS_XA2_F); in skge_reset()
2280 skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100)); in skge_reset()
2281 skge_write32(hw, B2_IRQM_CTRL, TIM_START); in skge_reset()
2283 skge_write32(hw, B0_IMSK, hw->intr_mask); in skge_reset()
2429 skge_write32(hw, B0_IMSK, 0); in skge_remove()
2463 skge_write32(hw, B0_IMSK, hw->intr_mask); in skge_net_irq()