120   Instr Mask(uint32_t mask) const {  in Mask()  function
160         static_cast<LoadStorePairOp>(Mask(LoadStorePairMask)));  in SizeLSPair()
165     return Mask(ConditionalBranchFMask) == ConditionalBranchFixed;  in IsCondBranchImm()
169     return Mask(UnconditionalBranchFMask) == UnconditionalBranchFixed;  in IsUncondBranchImm()
173     return Mask(CompareBranchFMask) == CompareBranchFixed;  in IsCompareBranch()
177     return Mask(TestBranchFMask) == TestBranchFixed;  in IsTestBranch()
185     return Mask(LoadLiteralFMask) == LoadLiteralFixed;  in IsLdrLiteral()
189     return Mask(LoadLiteralMask) == LDR_x_lit;  in IsLdrLiteralX()
193     return Mask(PCRelAddressingFMask) == PCRelAddressingFixed;  in IsPCRelAddressing()
197     return Mask(PCRelAddressingMask) == ADR;  in IsAdr()
200   bool IsBrk() const { return Mask(ExceptionMask) == BRK; }  in IsBrk()
209     return Mask(LogicalImmediateFMask) == LogicalImmediateFixed;  in IsLogicalImmediate()
213     return Mask(AddSubImmediateFMask) == AddSubImmediateFixed;  in IsAddSubImmediate()
217     return Mask(AddSubShiftedFMask) == AddSubShiftedFixed;  in IsAddSubShifted()
221     return Mask(AddSubExtendedFMask) == AddSubExtendedFixed;  in IsAddSubExtended()
226     return Mask(LoadStoreAnyFMask) == LoadStoreAnyFixed;  in IsLoadOrStore()
243       if (Mask(AddSubSetFlagsBit)) {  in RdMode()
254       if (Mask(LogicalImmediateMask & LogicalOpMask) == ANDS) {  in RdMode()
335     return Mask(UnconditionalBranchToRegisterMask) == BLR;  in IsBranchAndLinkToRegister()
339     return (Mask(MoveWideImmediateMask) == MOVZ_x) ||  in IsMovz()
340            (Mask(MoveWideImmediateMask) == MOVZ_w);  in IsMovz()
344     return (Mask(MoveWideImmediateMask) == MOVK_x) ||  in IsMovk()
345            (Mask(MoveWideImmediateMask) == MOVK_w);  in IsMovk()
349     return (Mask(MoveWideImmediateMask) == MOVN_x) ||  in IsMovn()
350            (Mask(MoveWideImmediateMask) == MOVN_w);  in IsMovn()
358     return (Mask(LogicalShiftedMask) == ORR_x) &&  in IsNop()