Lines Matching refs:Arith
823 i->ARM64in.Arith.dst = dst; in ARM64Instr_Arith()
824 i->ARM64in.Arith.argL = argL; in ARM64Instr_Arith()
825 i->ARM64in.Arith.argR = argR; in ARM64Instr_Arith()
826 i->ARM64in.Arith.isAdd = isAdd; in ARM64Instr_Arith()
1366 vex_printf("%s ", i->ARM64in.Arith.isAdd ? "add" : "sub"); in ppARM64Instr()
1367 ppHRegARM64(i->ARM64in.Arith.dst); in ppARM64Instr()
1369 ppHRegARM64(i->ARM64in.Arith.argL); in ppARM64Instr()
1371 ppARM64RIA(i->ARM64in.Arith.argR); in ppARM64Instr()
1910 addHRegUse(u, HRmWrite, i->ARM64in.Arith.dst); in getRegUsage_ARM64Instr()
1911 addHRegUse(u, HRmRead, i->ARM64in.Arith.argL); in getRegUsage_ARM64Instr()
1912 addRegUsage_ARM64RIA(u, i->ARM64in.Arith.argR); in getRegUsage_ARM64Instr()
2236 i->ARM64in.Arith.dst = lookupHRegRemap(m, i->ARM64in.Arith.dst); in mapRegs_ARM64Instr()
2237 i->ARM64in.Arith.argL = lookupHRegRemap(m, i->ARM64in.Arith.argL); in mapRegs_ARM64Instr()
2238 mapRegs_ARM64RIA(m, i->ARM64in.Arith.argR); in mapRegs_ARM64Instr()
3265 UInt rD = iregEnc(i->ARM64in.Arith.dst); in emit_ARM64Instr()
3266 UInt rN = iregEnc(i->ARM64in.Arith.argL); in emit_ARM64Instr()
3267 ARM64RIA* argR = i->ARM64in.Arith.argR; in emit_ARM64Instr()
3271 i->ARM64in.Arith.isAdd ? X10 : X11, in emit_ARM64Instr()
3278 UInt rM = iregEnc(i->ARM64in.Arith.argR->ARM64riA.R.reg); in emit_ARM64Instr()
3280 i->ARM64in.Arith.isAdd ? X100 : X110, in emit_ARM64Instr()