Lines Matching refs:env
115 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp ) in lookupIRTemp() argument
118 vassert(tmp < env->n_vregmap); in lookupIRTemp()
119 return env->vregmap[tmp]; in lookupIRTemp()
123 ISelEnv* env, IRTemp tmp ) in lookupIRTempPair() argument
126 vassert(tmp < env->n_vregmap); in lookupIRTempPair()
127 vassert(! hregIsInvalid(env->vregmapHI[tmp])); in lookupIRTempPair()
128 *vrLO = env->vregmap[tmp]; in lookupIRTempPair()
129 *vrHI = env->vregmapHI[tmp]; in lookupIRTempPair()
132 static void addInstr ( ISelEnv* env, ARM64Instr* instr ) in addInstr() argument
134 addHInstr(env->code, instr); in addInstr()
141 static HReg newVRegI ( ISelEnv* env ) in newVRegI() argument
143 HReg reg = mkHReg(True/*virtual reg*/, HRcInt64, 0, env->vreg_ctr); in newVRegI()
144 env->vreg_ctr++; in newVRegI()
148 static HReg newVRegD ( ISelEnv* env ) in newVRegD() argument
150 HReg reg = mkHReg(True/*virtual reg*/, HRcFlt64, 0, env->vreg_ctr); in newVRegD()
151 env->vreg_ctr++; in newVRegD()
155 static HReg newVRegV ( ISelEnv* env ) in newVRegV() argument
157 HReg reg = mkHReg(True/*virtual reg*/, HRcVec128, 0, env->vreg_ctr); in newVRegV()
158 env->vreg_ctr++; in newVRegV()
178 static ARM64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env,
180 static ARM64AMode* iselIntExpr_AMode ( ISelEnv* env,
183 static ARM64RIA* iselIntExpr_RIA_wrk ( ISelEnv* env, IRExpr* e );
184 static ARM64RIA* iselIntExpr_RIA ( ISelEnv* env, IRExpr* e );
186 static ARM64RIL* iselIntExpr_RIL_wrk ( ISelEnv* env, IRExpr* e );
187 static ARM64RIL* iselIntExpr_RIL ( ISelEnv* env, IRExpr* e );
189 static ARM64RI6* iselIntExpr_RI6_wrk ( ISelEnv* env, IRExpr* e );
190 static ARM64RI6* iselIntExpr_RI6 ( ISelEnv* env, IRExpr* e );
192 static ARM64CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e );
193 static ARM64CondCode iselCondCode ( ISelEnv* env, IRExpr* e );
195 static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e );
196 static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e );
199 ISelEnv* env, IRExpr* e );
201 ISelEnv* env, IRExpr* e );
203 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e );
204 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e );
206 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e );
207 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e );
209 static HReg iselF16Expr_wrk ( ISelEnv* env, IRExpr* e );
210 static HReg iselF16Expr ( ISelEnv* env, IRExpr* e );
212 static HReg iselV128Expr_wrk ( ISelEnv* env, IRExpr* e );
213 static HReg iselV128Expr ( ISelEnv* env, IRExpr* e );
216 ISelEnv* env, IRExpr* e );
218 ISelEnv* env, IRExpr* e );
262 static HReg mk_baseblock_128bit_access_addr ( ISelEnv* env, UInt off ) in mk_baseblock_128bit_access_addr() argument
265 HReg r = newVRegI(env); in mk_baseblock_128bit_access_addr()
266 addInstr(env, ARM64Instr_Arith(r, hregARM64_X21(), in mk_baseblock_128bit_access_addr()
278 static HReg widen_z_32_to_64 ( ISelEnv* env, HReg src ) in widen_z_32_to_64() argument
280 HReg dst = newVRegI(env); in widen_z_32_to_64()
282 addInstr(env, ARM64Instr_Logic(dst, src, mask, ARM64lo_AND)); in widen_z_32_to_64()
288 static HReg widen_s_16_to_64 ( ISelEnv* env, HReg src ) in widen_s_16_to_64() argument
290 HReg dst = newVRegI(env); in widen_s_16_to_64()
292 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL)); in widen_s_16_to_64()
293 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SAR)); in widen_s_16_to_64()
299 static HReg widen_z_16_to_64 ( ISelEnv* env, HReg src ) in widen_z_16_to_64() argument
301 HReg dst = newVRegI(env); in widen_z_16_to_64()
303 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL)); in widen_z_16_to_64()
304 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SHR)); in widen_z_16_to_64()
310 static HReg widen_s_32_to_64 ( ISelEnv* env, HReg src ) in widen_s_32_to_64() argument
312 HReg dst = newVRegI(env); in widen_s_32_to_64()
314 addInstr(env, ARM64Instr_Shift(dst, src, n32, ARM64sh_SHL)); in widen_s_32_to_64()
315 addInstr(env, ARM64Instr_Shift(dst, dst, n32, ARM64sh_SAR)); in widen_s_32_to_64()
321 static HReg widen_s_8_to_64 ( ISelEnv* env, HReg src ) in widen_s_8_to_64() argument
323 HReg dst = newVRegI(env); in widen_s_8_to_64()
325 addInstr(env, ARM64Instr_Shift(dst, src, n56, ARM64sh_SHL)); in widen_s_8_to_64()
326 addInstr(env, ARM64Instr_Shift(dst, dst, n56, ARM64sh_SAR)); in widen_s_8_to_64()
330 static HReg widen_z_8_to_64 ( ISelEnv* env, HReg src ) in widen_z_8_to_64() argument
332 HReg dst = newVRegI(env); in widen_z_8_to_64()
334 addInstr(env, ARM64Instr_Shift(dst, src, n56, ARM64sh_SHL)); in widen_z_8_to_64()
335 addInstr(env, ARM64Instr_Shift(dst, dst, n56, ARM64sh_SHR)); in widen_z_8_to_64()
381 void set_FPCR_rounding_mode ( ISelEnv* env, IRExpr* mode ) in set_FPCR_rounding_mode() argument
383 vassert(typeOfIRExpr(env->type_env,mode) == Ity_I32); in set_FPCR_rounding_mode()
386 if (env->previous_rm in set_FPCR_rounding_mode()
387 && env->previous_rm->tag == Iex_RdTmp in set_FPCR_rounding_mode()
389 && env->previous_rm->Iex.RdTmp.tmp == mode->Iex.RdTmp.tmp) { in set_FPCR_rounding_mode()
391 vassert(typeOfIRExpr(env->type_env, env->previous_rm) == Ity_I32); in set_FPCR_rounding_mode()
396 env->previous_rm = mode; in set_FPCR_rounding_mode()
415 HReg irrm = iselIntExpr_R(env, mode); in set_FPCR_rounding_mode()
416 HReg tL = newVRegI(env); in set_FPCR_rounding_mode()
417 HReg tR = newVRegI(env); in set_FPCR_rounding_mode()
418 HReg t3 = newVRegI(env); in set_FPCR_rounding_mode()
430 addInstr(env, ARM64Instr_Shift(tL, irrm, ARM64RI6_I6(1), ARM64sh_SHL)); in set_FPCR_rounding_mode()
431 addInstr(env, ARM64Instr_Shift(tR, irrm, ARM64RI6_I6(1), ARM64sh_SHR)); in set_FPCR_rounding_mode()
432 addInstr(env, ARM64Instr_Logic(tL, tL, ril_two, ARM64lo_AND)); in set_FPCR_rounding_mode()
433 addInstr(env, ARM64Instr_Logic(tR, tR, ril_one, ARM64lo_AND)); in set_FPCR_rounding_mode()
434 addInstr(env, ARM64Instr_Logic(t3, tL, ARM64RIL_R(tR), ARM64lo_OR)); in set_FPCR_rounding_mode()
435 addInstr(env, ARM64Instr_Shift(t3, t3, ARM64RI6_I6(22), ARM64sh_SHL)); in set_FPCR_rounding_mode()
436 addInstr(env, ARM64Instr_FPCR(True/*toFPCR*/, t3)); in set_FPCR_rounding_mode()
478 ISelEnv* env, in doHelperCall() argument
578 r_vecRetAddr = newVRegI(env); in doHelperCall()
579 addInstr(env, ARM64Instr_AddToSP(-16)); in doHelperCall()
580 addInstr(env, ARM64Instr_FromSP(r_vecRetAddr)); in doHelperCall()
644 aTy = typeOfIRExpr(env->type_env, args[i]); in doHelperCall()
650 addInstr(env, ARM64Instr_MovI( argregs[nextArgReg], in doHelperCall()
651 iselIntExpr_R(env, args[i]) )); in doHelperCall()
656 addInstr(env, ARM64Instr_MovI( argregs[nextArgReg], in doHelperCall()
683 aTy = typeOfIRExpr(env->type_env, args[i]); in doHelperCall()
689 tmpregs[nextArgReg] = iselIntExpr_R(env, args[i]); in doHelperCall()
717 cc = iselCondCode( env, guard ); in doHelperCall()
726 addInstr( env, ARM64Instr_MovI( argregs[i], tmpregs[i] ) ); in doHelperCall()
774 addInstr(env, ARM64Instr_Call( cc, target, nextArgReg, *retloc )); in doHelperCall()
844 ARM64AMode* iselIntExpr_AMode ( ISelEnv* env, IRExpr* e, IRType dty ) in iselIntExpr_AMode() argument
846 ARM64AMode* am = iselIntExpr_AMode_wrk(env, e, dty); in iselIntExpr_AMode()
852 ARM64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, IRExpr* e, IRType dty ) in iselIntExpr_AMode_wrk() argument
854 IRType ty = typeOfIRExpr(env->type_env,e); in iselIntExpr_AMode_wrk()
880 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
895 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
903 HReg reg1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
904 HReg reg2 = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_AMode_wrk()
910 HReg reg = iselIntExpr_R(env, e); in iselIntExpr_AMode_wrk()
919 static ARM64RIA* iselIntExpr_RIA ( ISelEnv* env, IRExpr* e ) in iselIntExpr_RIA() argument
921 ARM64RIA* ri = iselIntExpr_RIA_wrk(env, e); in iselIntExpr_RIA()
938 static ARM64RIA* iselIntExpr_RIA_wrk ( ISelEnv* env, IRExpr* e ) in iselIntExpr_RIA_wrk() argument
940 IRType ty = typeOfIRExpr(env->type_env,e); in iselIntExpr_RIA_wrk()
960 HReg r = iselIntExpr_R ( env, e ); in iselIntExpr_RIA_wrk()
1182 static ARM64RIL* iselIntExpr_RIL ( ISelEnv* env, IRExpr* e ) in iselIntExpr_RIL() argument
1184 ARM64RIL* ri = iselIntExpr_RIL_wrk(env, e); in iselIntExpr_RIL()
1202 static ARM64RIL* iselIntExpr_RIL_wrk ( ISelEnv* env, IRExpr* e ) in iselIntExpr_RIL_wrk() argument
1204 IRType ty = typeOfIRExpr(env->type_env,e); in iselIntExpr_RIL_wrk()
1232 HReg r = iselIntExpr_R ( env, e ); in iselIntExpr_RIL_wrk()
1242 static ARM64RI6* iselIntExpr_RI6 ( ISelEnv* env, IRExpr* e ) in iselIntExpr_RI6() argument
1244 ARM64RI6* ri = iselIntExpr_RI6_wrk(env, e); in iselIntExpr_RI6()
1261 static ARM64RI6* iselIntExpr_RI6_wrk ( ISelEnv* env, IRExpr* e ) in iselIntExpr_RI6_wrk() argument
1263 IRType ty = typeOfIRExpr(env->type_env,e); in iselIntExpr_RI6_wrk()
1283 HReg r = iselIntExpr_R ( env, e ); in iselIntExpr_RI6_wrk()
1295 static ARM64CondCode iselCondCode ( ISelEnv* env, IRExpr* e ) in iselCondCode() argument
1297 ARM64CondCode cc = iselCondCode_wrk(env,e); in iselCondCode()
1302 static ARM64CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e ) in iselCondCode_wrk() argument
1305 vassert(typeOfIRExpr(env->type_env,e) == Ity_I1); in iselCondCode_wrk()
1309 HReg rTmp = lookupIRTemp(env, e->Iex.RdTmp.tmp); in iselCondCode_wrk()
1313 addInstr(env, ARM64Instr_Test(rTmp, one)); in iselCondCode_wrk()
1320 ARM64CondCode cc = iselCondCode(env, e->Iex.Unop.arg); in iselCondCode_wrk()
1332 HReg rTmp = iselIntExpr_R(env, e->Iex.Unop.arg); in iselCondCode_wrk()
1335 addInstr(env, ARM64Instr_Test(rTmp, one)); in iselCondCode_wrk()
1343 HReg r1 = iselIntExpr_R(env, e->Iex.Unop.arg); in iselCondCode_wrk()
1345 addInstr(env, ARM64Instr_Test(r1, xFF)); in iselCondCode_wrk()
1353 HReg r1 = iselIntExpr_R(env, e->Iex.Unop.arg); in iselCondCode_wrk()
1355 addInstr(env, ARM64Instr_Test(r1, xFFFF)); in iselCondCode_wrk()
1363 HReg r1 = iselIntExpr_R(env, e->Iex.Unop.arg); in iselCondCode_wrk()
1365 addInstr(env, ARM64Instr_Cmp(r1, zero, True/*is64*/)); in iselCondCode_wrk()
1373 HReg r1 = iselIntExpr_R(env, e->Iex.Unop.arg); in iselCondCode_wrk()
1375 addInstr(env, ARM64Instr_Cmp(r1, zero, False/*!is64*/)); in iselCondCode_wrk()
1387 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1388 ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1389 addInstr(env, ARM64Instr_Cmp(argL, argR, True/*is64*/)); in iselCondCode_wrk()
1409 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1410 ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1411 addInstr(env, ARM64Instr_Cmp(argL, argR, False/*!is64*/)); in iselCondCode_wrk()
1430 static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e ) in iselIntExpr_R() argument
1432 HReg r = iselIntExpr_R_wrk(env, e); in iselIntExpr_R()
1443 static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) in iselIntExpr_R_wrk() argument
1445 IRType ty = typeOfIRExpr(env->type_env,e); in iselIntExpr_R_wrk()
1452 return lookupIRTemp(env, e->Iex.RdTmp.tmp); in iselIntExpr_R_wrk()
1457 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1463 ARM64AMode* amode = iselIntExpr_AMode ( env, e->Iex.Load.addr, ty ); in iselIntExpr_R_wrk()
1464 addInstr(env, ARM64Instr_LdSt64(True/*isLoad*/, dst, amode)); in iselIntExpr_R_wrk()
1468 ARM64AMode* amode = iselIntExpr_AMode ( env, e->Iex.Load.addr, ty ); in iselIntExpr_R_wrk()
1469 addInstr(env, ARM64Instr_LdSt32(True/*isLoad*/, dst, amode)); in iselIntExpr_R_wrk()
1473 ARM64AMode* amode = iselIntExpr_AMode ( env, e->Iex.Load.addr, ty ); in iselIntExpr_R_wrk()
1474 addInstr(env, ARM64Instr_LdSt16(True/*isLoad*/, dst, amode)); in iselIntExpr_R_wrk()
1478 ARM64AMode* amode = iselIntExpr_AMode ( env, e->Iex.Load.addr, ty ); in iselIntExpr_R_wrk()
1479 addInstr(env, ARM64Instr_LdSt8(True/*isLoad*/, dst, amode)); in iselIntExpr_R_wrk()
1498 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1499 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1500 addInstr(env, ARM64Instr_Unary(dst, argR, ARM64un_NEG)); in iselIntExpr_R_wrk()
1514 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1515 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1516 ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1517 addInstr(env, ARM64Instr_Arith(dst, argL, argR, isAdd)); in iselIntExpr_R_wrk()
1530 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1531 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1532 ARM64RIL* argR = iselIntExpr_RIL(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1533 addInstr(env, ARM64Instr_Logic(dst, argL, argR, lop)); in iselIntExpr_R_wrk()
1546 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1547 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1548 ARM64RI6* argR = iselIntExpr_RI6(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1549 addInstr(env, ARM64Instr_Shift(dst, argL, argR, sop)); in iselIntExpr_R_wrk()
1555 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1556 ARM64RI6* argR = iselIntExpr_RI6(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1557 HReg dst = zx ? widen_z_32_to_64(env, argL) in iselIntExpr_R_wrk()
1558 : widen_s_32_to_64(env, argL); in iselIntExpr_R_wrk()
1559 addInstr(env, ARM64Instr_Shift(dst, dst, argR, ARM64sh_SHR)); in iselIntExpr_R_wrk()
1567 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1568 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1569 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1570 addInstr(env, ARM64Instr_Mul(dst, argL, argR, ARM64mul_PLAIN)); in iselIntExpr_R_wrk()
1577 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1578 HReg extL = (isS ? widen_s_32_to_64 : widen_z_32_to_64)(env, argL); in iselIntExpr_R_wrk()
1579 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1580 HReg extR = (isS ? widen_s_32_to_64 : widen_z_32_to_64)(env, argR); in iselIntExpr_R_wrk()
1581 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1582 addInstr(env, ARM64Instr_Mul(dst, extL, extR, ARM64mul_PLAIN)); in iselIntExpr_R_wrk()
1589 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1590 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1591 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1592 addInstr(env, ARM64Instr_Cmp(argL, ARM64RIA_R(argR), False/*!is64*/)); in iselIntExpr_R_wrk()
1593 addInstr(env, ARM64Instr_CSel(dst, argL, argR, ARM64cc_CS)); in iselIntExpr_R_wrk()
1598 HReg hi32s = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1599 HReg lo32s = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1600 HReg lo32 = widen_z_32_to_64(env, lo32s); in iselIntExpr_R_wrk()
1601 HReg hi32 = newVRegI(env); in iselIntExpr_R_wrk()
1602 addInstr(env, ARM64Instr_Shift(hi32, hi32s, ARM64RI6_I6(32), in iselIntExpr_R_wrk()
1604 addInstr(env, ARM64Instr_Logic(hi32, hi32, ARM64RIL_R(lo32), in iselIntExpr_R_wrk()
1611 HReg dL = (isD ? iselDblExpr : iselFltExpr)(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1612 HReg dR = (isD ? iselDblExpr : iselFltExpr)(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1613 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1614 HReg imm = newVRegI(env); in iselIntExpr_R_wrk()
1617 addInstr(env, (isD ? ARM64Instr_VCmpD : ARM64Instr_VCmpS)(dL, dR)); in iselIntExpr_R_wrk()
1618 addInstr(env, ARM64Instr_Imm64(dst, 0)); in iselIntExpr_R_wrk()
1619 addInstr(env, ARM64Instr_Imm64(imm, 0x40)); // 0x40 = Ircr_EQ in iselIntExpr_R_wrk()
1620 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_EQ)); in iselIntExpr_R_wrk()
1621 addInstr(env, ARM64Instr_Imm64(imm, 0x01)); // 0x01 = Ircr_LT in iselIntExpr_R_wrk()
1622 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_MI)); in iselIntExpr_R_wrk()
1623 addInstr(env, ARM64Instr_Imm64(imm, 0x00)); // 0x00 = Ircr_GT in iselIntExpr_R_wrk()
1624 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_GT)); in iselIntExpr_R_wrk()
1625 addInstr(env, ARM64Instr_Imm64(imm, 0x45)); // 0x45 = Ircr_UN in iselIntExpr_R_wrk()
1626 addInstr(env, ARM64Instr_CSel(dst, imm, dst, ARM64cc_VS)); in iselIntExpr_R_wrk()
1679 (env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1680 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1681 addInstr(env, ARM64Instr_VCvtF2I(cvt_op, dst, src, armrm)); in iselIntExpr_R_wrk()
1702 HReg regL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1703 HReg regR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1704 HReg res = newVRegI(env); in iselIntExpr_R_wrk()
1705 addInstr(env, ARM64Instr_MovI(hregARM64_X0(), regL)); in iselIntExpr_R_wrk()
1706 addInstr(env, ARM64Instr_MovI(hregARM64_X1(), regR)); in iselIntExpr_R_wrk()
1707 addInstr(env, ARM64Instr_Call( ARM64cc_AL, (Addr)fn, in iselIntExpr_R_wrk()
1709 addInstr(env, ARM64Instr_MovI(res, hregARM64_X0())); in iselIntExpr_R_wrk()
1724 HReg src = iselIntExpr_R(env, arg); in iselIntExpr_R_wrk()
1725 HReg dst = widen_z_16_to_64(env, src); in iselIntExpr_R_wrk()
1733 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1735 = iselIntExpr_AMode(env, arg->Iex.Load.addr, Ity_I32); in iselIntExpr_R_wrk()
1736 addInstr(env, ARM64Instr_LdSt32(True/*isLoad*/, dst, am)); in iselIntExpr_R_wrk()
1740 HReg src = iselIntExpr_R(env, arg); in iselIntExpr_R_wrk()
1741 HReg dst = widen_z_32_to_64(env, src); in iselIntExpr_R_wrk()
1750 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1752 = iselIntExpr_AMode(env, arg->Iex.Load.addr, Ity_I8); in iselIntExpr_R_wrk()
1753 addInstr(env, ARM64Instr_LdSt8(True/*isLoad*/, dst, am)); in iselIntExpr_R_wrk()
1757 HReg src = iselIntExpr_R(env, arg); in iselIntExpr_R_wrk()
1758 HReg dst = widen_z_8_to_64(env, src); in iselIntExpr_R_wrk()
1763 iselInt128Expr(&rHi,&rLo, env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1768 HReg src = iselIntExpr_R(env, arg); in iselIntExpr_R_wrk()
1769 HReg dst = widen_s_8_to_64(env, src); in iselIntExpr_R_wrk()
1774 HReg src = iselIntExpr_R(env, arg); in iselIntExpr_R_wrk()
1775 HReg dst = widen_s_16_to_64(env, src); in iselIntExpr_R_wrk()
1780 HReg src = iselIntExpr_R(env, arg); in iselIntExpr_R_wrk()
1781 HReg dst = widen_s_32_to_64(env, src); in iselIntExpr_R_wrk()
1786 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1787 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1788 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NOT)); in iselIntExpr_R_wrk()
1792 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1793 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1794 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_CLZ)); in iselIntExpr_R_wrk()
1802 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1803 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1804 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NEG)); in iselIntExpr_R_wrk()
1805 addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src), in iselIntExpr_R_wrk()
1812 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1813 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1814 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NEG)); in iselIntExpr_R_wrk()
1815 addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src), in iselIntExpr_R_wrk()
1817 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
1824 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1825 HReg pre = iselIntExpr_R(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1826 HReg src = widen_z_32_to_64(env, pre); in iselIntExpr_R_wrk()
1827 addInstr(env, ARM64Instr_Unary(dst, src, ARM64un_NEG)); in iselIntExpr_R_wrk()
1828 addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src), in iselIntExpr_R_wrk()
1830 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
1835 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1836 HReg src = iselV128Expr(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1838 addInstr(env, ARM64Instr_VXfromQ(dst, src, laneNo)); in iselIntExpr_R_wrk()
1842 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1843 HReg src = iselDblExpr(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1844 addInstr(env, ARM64Instr_VXfromDorS(dst, src, True/*fromD*/)); in iselIntExpr_R_wrk()
1848 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1849 HReg src = iselFltExpr(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1850 addInstr(env, ARM64Instr_VXfromDorS(dst, src, False/*!fromD*/)); in iselIntExpr_R_wrk()
1858 HReg zero = newVRegI(env); in iselIntExpr_R_wrk()
1859 HReg one = newVRegI(env); in iselIntExpr_R_wrk()
1860 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1861 addInstr(env, ARM64Instr_Imm64(zero, 0)); in iselIntExpr_R_wrk()
1862 addInstr(env, ARM64Instr_Imm64(one, 1)); in iselIntExpr_R_wrk()
1863 ARM64CondCode cc = iselCondCode(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1864 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc)); in iselIntExpr_R_wrk()
1865 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
1867 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
1884 HReg src = iselV128Expr(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1885 HReg tmp = newVRegV(env); in iselIntExpr_R_wrk()
1886 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1917 addInstr(env, ARM64Instr_VNarrowV(op, dszBlg2, tmp, src)); in iselIntExpr_R_wrk()
1918 addInstr(env, ARM64Instr_VXfromQ(dst, tmp, 0/*laneNo*/)); in iselIntExpr_R_wrk()
1923 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1926 HReg src = lookupIRTemp(env, e->Iex.Unop.arg->Iex.RdTmp.tmp); in iselIntExpr_R_wrk()
1928 addInstr(env, ARM64Instr_Logic(dst, src, one, ARM64lo_AND)); in iselIntExpr_R_wrk()
1931 HReg zero = newVRegI(env); in iselIntExpr_R_wrk()
1932 HReg one = newVRegI(env); in iselIntExpr_R_wrk()
1933 addInstr(env, ARM64Instr_Imm64(zero, 0)); in iselIntExpr_R_wrk()
1934 addInstr(env, ARM64Instr_Imm64(one, 1)); in iselIntExpr_R_wrk()
1935 ARM64CondCode cc = iselCondCode(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1936 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc)); in iselIntExpr_R_wrk()
1944 return iselIntExpr_R(env, e->Iex.Unop.arg); in iselIntExpr_R_wrk()
1957 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1960 addInstr(env, ARM64Instr_LdSt64(True/*isLoad*/, dst, am)); in iselIntExpr_R_wrk()
1965 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1968 addInstr(env, ARM64Instr_LdSt32(True/*isLoad*/, dst, am)); in iselIntExpr_R_wrk()
1973 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1976 addInstr(env, ARM64Instr_LdSt16(True/*isLoad*/, dst, am)); in iselIntExpr_R_wrk()
1981 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
1984 addInstr(env, ARM64Instr_LdSt8(True/*isLoad*/, dst, am)); in iselIntExpr_R_wrk()
1992 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
2004 Bool ok = doHelperCall( &addToSp, &rloc, env, NULL/*guard*/, in iselIntExpr_R_wrk()
2012 addInstr(env, ARM64Instr_MovI(dst, hregARM64_X0())); in iselIntExpr_R_wrk()
2022 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
2030 addInstr(env, ARM64Instr_Imm64(dst, u)); in iselIntExpr_R_wrk()
2039 HReg r1 = iselIntExpr_R(env, e->Iex.ITE.iftrue); in iselIntExpr_R_wrk()
2040 HReg r0 = iselIntExpr_R(env, e->Iex.ITE.iffalse); in iselIntExpr_R_wrk()
2041 HReg dst = newVRegI(env); in iselIntExpr_R_wrk()
2042 cc = iselCondCode(env, e->Iex.ITE.cond); in iselIntExpr_R_wrk()
2043 addInstr(env, ARM64Instr_CSel(dst, r1, r0, cc)); in iselIntExpr_R_wrk()
2070 ISelEnv* env, IRExpr* e ) in iselInt128Expr() argument
2072 iselInt128Expr_wrk(rHi, rLo, env, e); in iselInt128Expr()
2084 ISelEnv* env, IRExpr* e ) in iselInt128Expr_wrk() argument
2087 vassert(typeOfIRExpr(env->type_env,e) == Ity_I128); in iselInt128Expr_wrk()
2096 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselInt128Expr_wrk()
2097 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt128Expr_wrk()
2098 HReg dstLo = newVRegI(env); in iselInt128Expr_wrk()
2099 HReg dstHi = newVRegI(env); in iselInt128Expr_wrk()
2100 addInstr(env, ARM64Instr_Mul(dstLo, argL, argR, in iselInt128Expr_wrk()
2102 addInstr(env, ARM64Instr_Mul(dstHi, argL, argR, in iselInt128Expr_wrk()
2110 *rHi = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselInt128Expr_wrk()
2111 *rLo = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt128Expr_wrk()
2127 static HReg iselV128Expr ( ISelEnv* env, IRExpr* e ) in iselV128Expr() argument
2129 HReg r = iselV128Expr_wrk( env, e ); in iselV128Expr()
2136 static HReg iselV128Expr_wrk ( ISelEnv* env, IRExpr* e ) in iselV128Expr_wrk() argument
2138 IRType ty = typeOfIRExpr(env->type_env, e); in iselV128Expr_wrk()
2143 return lookupIRTemp(env, e->Iex.RdTmp.tmp); in iselV128Expr_wrk()
2150 HReg res = newVRegV(env); in iselV128Expr_wrk()
2153 addInstr(env, ARM64Instr_VImmQ(res, con)); in iselV128Expr_wrk()
2156 addInstr(env, ARM64Instr_VImmQ(res, 0x000F)); in iselV128Expr_wrk()
2157 addInstr(env, ARM64Instr_VExtV(res, res, res, 12)); in iselV128Expr_wrk()
2160 addInstr(env, ARM64Instr_VImmQ(res, 0x000F)); in iselV128Expr_wrk()
2161 addInstr(env, ARM64Instr_VExtV(res, res, res, 8)); in iselV128Expr_wrk()
2164 addInstr(env, ARM64Instr_VImmQ(res, 0x00FF)); in iselV128Expr_wrk()
2165 addInstr(env, ARM64Instr_VExtV(res, res, res, 12)); in iselV128Expr_wrk()
2168 addInstr(env, ARM64Instr_VImmQ(res, 0x000F)); in iselV128Expr_wrk()
2169 addInstr(env, ARM64Instr_VExtV(res, res, res, 4)); in iselV128Expr_wrk()
2170 addInstr(env, ARM64Instr_VUnaryV(ARM64vecu_NOT, res, res)); in iselV128Expr_wrk()
2173 addInstr(env, ARM64Instr_VImmQ(res, 0x000F)); in iselV128Expr_wrk()
2174 addInstr(env, ARM64Instr_VExtV(res, res, res, 4)); in iselV128Expr_wrk()
2177 addInstr(env, ARM64Instr_VImmQ(res, 0x00FF)); in iselV128Expr_wrk()
2178 addInstr(env, ARM64Instr_VExtV(res, res, res, 8)); in iselV128Expr_wrk()
2188 HReg res = newVRegV(env); in iselV128Expr_wrk()
2189 HReg rN = iselIntExpr_R(env, e->Iex.Load.addr); in iselV128Expr_wrk()
2191 addInstr(env, ARM64Instr_VLdStQ(True/*isLoad*/, res, rN)); in iselV128Expr_wrk()
2198 HReg addr = mk_baseblock_128bit_access_addr(env, offs); in iselV128Expr_wrk()
2199 HReg res = newVRegV(env); in iselV128Expr_wrk()
2201 addInstr(env, ARM64Instr_VLdStQ(True/*isLoad*/, res, addr)); in iselV128Expr_wrk()
2219 HReg src = iselV128Expr(env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2220 HReg imm = newVRegV(env); in iselV128Expr_wrk()
2221 HReg res = newVRegV(env); in iselV128Expr_wrk()
2222 addInstr(env, ARM64Instr_VImmQ(imm, imm16)); in iselV128Expr_wrk()
2223 addInstr(env, ARM64Instr_VBinV(ARM64vecb_AND, res, src, imm)); in iselV128Expr_wrk()
2247 HReg res = newVRegV(env); in iselV128Expr_wrk()
2248 HReg arg = iselV128Expr(env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2291 set_FPCR_rounding_mode(env, IRExpr_Const( in iselV128Expr_wrk()
2294 addInstr(env, ARM64Instr_VUnaryV(op, res, arg)); in iselV128Expr_wrk()
2301 HReg arg = iselV128Expr(env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2302 HReg zero = newVRegV(env); in iselV128Expr_wrk()
2303 HReg res = newVRegV(env); in iselV128Expr_wrk()
2314 addInstr(env, ARM64Instr_VImmQ(zero, 0x0000)); in iselV128Expr_wrk()
2315 addInstr(env, ARM64Instr_VBinV(cmp, res, arg, zero)); in iselV128Expr_wrk()
2316 addInstr(env, ARM64Instr_VUnaryV(ARM64vecu_NOT, res, res)); in iselV128Expr_wrk()
2322 iselV256Expr(&vHi, &vLo, env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2326 HReg res = newVRegV(env); in iselV128Expr_wrk()
2327 HReg arg = iselIntExpr_R(env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2328 addInstr(env, ARM64Instr_VQfromX(res, arg)); in iselV128Expr_wrk()
2332 HReg res = newVRegV(env); in iselV128Expr_wrk()
2333 HReg arg = iselIntExpr_R(env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2334 addInstr(env, ARM64Instr_VQfromX(res, arg)); in iselV128Expr_wrk()
2335 addInstr(env, ARM64Instr_VBinV(ARM64vecb_ZIP18x16, res, res, res)); in iselV128Expr_wrk()
2336 addInstr(env, ARM64Instr_VShiftImmV(ARM64vecshi_SSHR16x8, in iselV128Expr_wrk()
2341 HReg res = newVRegV(env); in iselV128Expr_wrk()
2342 HReg arg = iselIntExpr_R(env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2343 addInstr(env, ARM64Instr_VQfromX(res, arg)); in iselV128Expr_wrk()
2344 addInstr(env, ARM64Instr_VBinV(ARM64vecb_ZIP116x8, res, res, res)); in iselV128Expr_wrk()
2345 addInstr(env, ARM64Instr_VShiftImmV(ARM64vecshi_SSHR32x4, in iselV128Expr_wrk()
2350 HReg res = newVRegV(env); in iselV128Expr_wrk()
2351 HReg arg = iselIntExpr_R(env, e->Iex.Unop.arg); in iselV128Expr_wrk()
2352 addInstr(env, ARM64Instr_VQfromX(res, arg)); in iselV128Expr_wrk()
2353 addInstr(env, ARM64Instr_VBinV(ARM64vecb_ZIP132x4, res, res, res)); in iselV128Expr_wrk()
2354 addInstr(env, ARM64Instr_VShiftImmV(ARM64vecshi_SSHR64x2, in iselV128Expr_wrk()
2368 HReg arg = iselV128Expr(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2369 HReg res = newVRegV(env); in iselV128Expr_wrk()
2370 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2374 addInstr(env, ARM64Instr_VUnaryV(op, res, arg)); in iselV128Expr_wrk()
2378 HReg res = newVRegV(env); in iselV128Expr_wrk()
2379 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2380 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2381 addInstr(env, ARM64Instr_VQfromXX(res, argL, argR)); in iselV128Expr_wrk()
2439 HReg res = newVRegV(env); in iselV128Expr_wrk()
2440 HReg argL = iselV128Expr(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2441 HReg argR = iselV128Expr(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2574 set_FPCR_rounding_mode(env, IRExpr_Const( in iselV128Expr_wrk()
2578 addInstr(env, ARM64Instr_VBinV(op, res, argR, argL)); in iselV128Expr_wrk()
2580 addInstr(env, ARM64Instr_VBinV(op, res, argL, argR)); in iselV128Expr_wrk()
2591 HReg res = newVRegV(env); in iselV128Expr_wrk()
2592 HReg argL = iselV128Expr(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2593 HReg argR = iselV128Expr(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2613 addInstr(env, ARM64Instr_VMov(16, res, argR)); in iselV128Expr_wrk()
2614 addInstr(env, ARM64Instr_VModifyV(op, res, argL)); in iselV128Expr_wrk()
2698 HReg src = iselV128Expr(env, argL); in iselV128Expr_wrk()
2699 HReg dst = newVRegV(env); in iselV128Expr_wrk()
2700 addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt)); in iselV128Expr_wrk()
2710 return iselV128Expr(env, argL); in iselV128Expr_wrk()
2801 HReg src = iselV128Expr(env, argL); in iselV128Expr_wrk()
2802 HReg dst = newVRegV(env); in iselV128Expr_wrk()
2803 HReg fpsr = newVRegI(env); in iselV128Expr_wrk()
2808 addInstr(env, ARM64Instr_Imm64(fpsr, 0)); in iselV128Expr_wrk()
2809 addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr)); in iselV128Expr_wrk()
2810 addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt)); in iselV128Expr_wrk()
2811 addInstr(env, ARM64Instr_FPSR(False/*!toFPSR*/, fpsr)); in iselV128Expr_wrk()
2812 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27), in iselV128Expr_wrk()
2816 addInstr(env, ARM64Instr_Logic(fpsr, in iselV128Expr_wrk()
2823 HReg scratch = newVRegV(env); in iselV128Expr_wrk()
2824 addInstr(env, ARM64Instr_VQfromX(scratch, fpsr)); in iselV128Expr_wrk()
2825 addInstr(env, ARM64Instr_VBinV(ARM64vecb_UZP164x2, in iselV128Expr_wrk()
2859 HReg src = iselV128Expr(env, argL); in iselV128Expr_wrk()
2860 HReg srcZ = newVRegV(env); in iselV128Expr_wrk()
2861 addInstr(env, ARM64Instr_VImmQ(srcZ, 0x0000)); in iselV128Expr_wrk()
2864 HReg dst = newVRegV(env); in iselV128Expr_wrk()
2866 addInstr(env, ARM64Instr_VExtV(dst, src/*lo*/, srcZ/*hi*/, in iselV128Expr_wrk()
2869 addInstr(env, ARM64Instr_VExtV(dst, srcZ/*lo*/, src/*hi*/, in iselV128Expr_wrk()
2889 HReg iSrcL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2890 HReg iSrcR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2891 HReg vSrcL = newVRegV(env); in iselV128Expr_wrk()
2892 HReg vSrcR = newVRegV(env); in iselV128Expr_wrk()
2893 HReg dst = newVRegV(env); in iselV128Expr_wrk()
2907 addInstr(env, ARM64Instr_VQfromXX(vSrcL, iSrcL, iSrcL)); in iselV128Expr_wrk()
2908 addInstr(env, ARM64Instr_VQfromXX(vSrcR, iSrcR, iSrcR)); in iselV128Expr_wrk()
2909 addInstr(env, ARM64Instr_VBinV(op, dst, vSrcL, vSrcR)); in iselV128Expr_wrk()
2934 HReg argL = iselV128Expr(env, triop->arg2); in iselV128Expr_wrk()
2935 HReg argR = iselV128Expr(env, triop->arg3); in iselV128Expr_wrk()
2936 HReg dst = newVRegV(env); in iselV128Expr_wrk()
2937 set_FPCR_rounding_mode(env, triop->arg1); in iselV128Expr_wrk()
2938 addInstr(env, ARM64Instr_VBinV(vecbop, dst, argL, argR)); in iselV128Expr_wrk()
2954 HReg srcHi = iselV128Expr(env, argHi); in iselV128Expr_wrk()
2955 HReg srcLo = iselV128Expr(env, argLo); in iselV128Expr_wrk()
2956 HReg dst = newVRegV(env); in iselV128Expr_wrk()
2957 addInstr(env, ARM64Instr_VExtV(dst, srcLo, srcHi, amt)); in iselV128Expr_wrk()
2981 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e ) in iselDblExpr() argument
2983 HReg r = iselDblExpr_wrk( env, e ); in iselDblExpr()
2993 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e ) in iselDblExpr_wrk() argument
2995 IRType ty = typeOfIRExpr(env->type_env,e); in iselDblExpr_wrk()
3000 return lookupIRTemp(env, e->Iex.RdTmp.tmp); in iselDblExpr_wrk()
3006 HReg src = newVRegI(env); in iselDblExpr_wrk()
3007 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3008 addInstr(env, ARM64Instr_Imm64(src, con->Ico.F64i)); in iselDblExpr_wrk()
3009 addInstr(env, ARM64Instr_VDfromX(dst, src)); in iselDblExpr_wrk()
3013 HReg src = newVRegI(env); in iselDblExpr_wrk()
3014 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3018 addInstr(env, ARM64Instr_Imm64(src, u.u64)); in iselDblExpr_wrk()
3019 addInstr(env, ARM64Instr_VDfromX(dst, src)); in iselDblExpr_wrk()
3026 HReg addr = iselIntExpr_R(env, e->Iex.Load.addr); in iselDblExpr_wrk()
3027 HReg res = newVRegD(env); in iselDblExpr_wrk()
3028 addInstr(env, ARM64Instr_VLdStD(True/*isLoad*/, res, addr, 0)); in iselDblExpr_wrk()
3035 HReg rD = newVRegD(env); in iselDblExpr_wrk()
3037 addInstr(env, ARM64Instr_VLdStD(True/*isLoad*/, rD, rN, offs)); in iselDblExpr_wrk()
3045 HReg src = iselDblExpr(env, e->Iex.Unop.arg); in iselDblExpr_wrk()
3046 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3047 addInstr(env, ARM64Instr_VUnaryD(ARM64fpu_NEG, dst, src)); in iselDblExpr_wrk()
3051 HReg src = iselDblExpr(env, e->Iex.Unop.arg); in iselDblExpr_wrk()
3052 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3053 addInstr(env, ARM64Instr_VUnaryD(ARM64fpu_ABS, dst, src)); in iselDblExpr_wrk()
3057 HReg src = iselFltExpr(env, e->Iex.Unop.arg); in iselDblExpr_wrk()
3058 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3059 addInstr(env, ARM64Instr_VCvtSD(True/*sToD*/, dst, src)); in iselDblExpr_wrk()
3063 HReg src = iselF16Expr(env, e->Iex.Unop.arg); in iselDblExpr_wrk()
3064 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3065 addInstr(env, ARM64Instr_VCvtHD(True/*hToD*/, dst, src)); in iselDblExpr_wrk()
3073 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); in iselDblExpr_wrk()
3074 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3077 addInstr(env, ARM64Instr_VCvtI2F(cvt_op, dst, src)); in iselDblExpr_wrk()
3090 HReg src = iselDblExpr(env, e->Iex.Binop.arg2); in iselDblExpr_wrk()
3091 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3092 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselDblExpr_wrk()
3100 addInstr(env, ARM64Instr_VUnaryD(op, dst, src)); in iselDblExpr_wrk()
3107 HReg srcI = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselDblExpr_wrk()
3108 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselDblExpr_wrk()
3109 HReg dstS = newVRegD(env); in iselDblExpr_wrk()
3110 addInstr(env, ARM64Instr_VCvtI2F(cvt_op, dstS, srcI)); in iselDblExpr_wrk()
3129 HReg argL = iselDblExpr(env, triop->arg2); in iselDblExpr_wrk()
3130 HReg argR = iselDblExpr(env, triop->arg3); in iselDblExpr_wrk()
3131 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3132 set_FPCR_rounding_mode(env, triop->arg1); in iselDblExpr_wrk()
3133 addInstr(env, ARM64Instr_VBinD(dblop, dst, argL, argR)); in iselDblExpr_wrk()
3141 HReg r1 = iselDblExpr(env, e->Iex.ITE.iftrue); in iselDblExpr_wrk()
3142 HReg r0 = iselDblExpr(env, e->Iex.ITE.iffalse); in iselDblExpr_wrk()
3143 HReg dst = newVRegD(env); in iselDblExpr_wrk()
3144 cc = iselCondCode(env, e->Iex.ITE.cond); in iselDblExpr_wrk()
3145 addInstr(env, ARM64Instr_VFCSel(dst, r1, r0, cc, True/*64-bit*/)); in iselDblExpr_wrk()
3164 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e ) in iselFltExpr() argument
3166 HReg r = iselFltExpr_wrk( env, e ); in iselFltExpr()
3176 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ) in iselFltExpr_wrk() argument
3178 IRType ty = typeOfIRExpr(env->type_env,e); in iselFltExpr_wrk()
3183 return lookupIRTemp(env, e->Iex.RdTmp.tmp); in iselFltExpr_wrk()
3193 HReg src = newVRegI(env); in iselFltExpr_wrk()
3194 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3195 addInstr(env, ARM64Instr_Imm64(src, 0)); in iselFltExpr_wrk()
3196 addInstr(env, ARM64Instr_VDfromX(dst, src)); in iselFltExpr_wrk()
3200 HReg src = newVRegI(env); in iselFltExpr_wrk()
3201 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3205 addInstr(env, ARM64Instr_Imm64(src, (ULong)u.u32)); in iselFltExpr_wrk()
3206 addInstr(env, ARM64Instr_VDfromX(dst, src)); in iselFltExpr_wrk()
3213 HReg addr = iselIntExpr_R(env, e->Iex.Load.addr); in iselFltExpr_wrk()
3214 HReg res = newVRegD(env); in iselFltExpr_wrk()
3215 addInstr(env, ARM64Instr_VLdStS(True/*isLoad*/, res, addr, 0)); in iselFltExpr_wrk()
3222 HReg rD = newVRegD(env); in iselFltExpr_wrk()
3224 addInstr(env, ARM64Instr_VLdStS(True/*isLoad*/, rD, rN, offs)); in iselFltExpr_wrk()
3232 HReg src = iselFltExpr(env, e->Iex.Unop.arg); in iselFltExpr_wrk()
3233 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3234 addInstr(env, ARM64Instr_VUnaryS(ARM64fpu_NEG, dst, src)); in iselFltExpr_wrk()
3238 HReg src = iselFltExpr(env, e->Iex.Unop.arg); in iselFltExpr_wrk()
3239 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3240 addInstr(env, ARM64Instr_VUnaryS(ARM64fpu_ABS, dst, src)); in iselFltExpr_wrk()
3244 HReg src = iselF16Expr(env, e->Iex.Unop.arg); in iselFltExpr_wrk()
3245 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3246 addInstr(env, ARM64Instr_VCvtHS(True/*hToS*/, dst, src)); in iselFltExpr_wrk()
3259 HReg src = iselFltExpr(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
3260 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3261 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselFltExpr_wrk()
3269 addInstr(env, ARM64Instr_VUnaryS(op, dst, src)); in iselFltExpr_wrk()
3273 HReg srcD = iselDblExpr(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
3274 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselFltExpr_wrk()
3275 HReg dstS = newVRegD(env); in iselFltExpr_wrk()
3276 addInstr(env, ARM64Instr_VCvtSD(False/*!sToD*/, dstS, srcD)); in iselFltExpr_wrk()
3291 HReg srcI = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
3292 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselFltExpr_wrk()
3293 HReg dstS = newVRegD(env); in iselFltExpr_wrk()
3294 addInstr(env, ARM64Instr_VCvtI2F(cvt_op, dstS, srcI)); in iselFltExpr_wrk()
3313 HReg argL = iselFltExpr(env, triop->arg2); in iselFltExpr_wrk()
3314 HReg argR = iselFltExpr(env, triop->arg3); in iselFltExpr_wrk()
3315 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3316 set_FPCR_rounding_mode(env, triop->arg1); in iselFltExpr_wrk()
3317 addInstr(env, ARM64Instr_VBinS(sglop, dst, argL, argR)); in iselFltExpr_wrk()
3325 HReg r1 = iselFltExpr(env, e->Iex.ITE.iftrue); in iselFltExpr_wrk()
3326 HReg r0 = iselFltExpr(env, e->Iex.ITE.iffalse); in iselFltExpr_wrk()
3327 HReg dst = newVRegD(env); in iselFltExpr_wrk()
3328 cc = iselCondCode(env, e->Iex.ITE.cond); in iselFltExpr_wrk()
3329 addInstr(env, ARM64Instr_VFCSel(dst, r1, r0, cc, False/*!64-bit*/)); in iselFltExpr_wrk()
3348 static HReg iselF16Expr ( ISelEnv* env, IRExpr* e ) in iselF16Expr() argument
3350 HReg r = iselF16Expr_wrk( env, e ); in iselF16Expr()
3360 static HReg iselF16Expr_wrk ( ISelEnv* env, IRExpr* e ) in iselF16Expr_wrk() argument
3362 IRType ty = typeOfIRExpr(env->type_env,e); in iselF16Expr_wrk()
3369 HReg rD = newVRegD(env); in iselF16Expr_wrk()
3371 addInstr(env, ARM64Instr_VLdStH(True/*isLoad*/, rD, rN, offs)); in iselF16Expr_wrk()
3379 HReg srcS = iselFltExpr(env, e->Iex.Binop.arg2); in iselF16Expr_wrk()
3380 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselF16Expr_wrk()
3381 HReg dstH = newVRegD(env); in iselF16Expr_wrk()
3382 addInstr(env, ARM64Instr_VCvtHS(False/*!hToS*/, dstH, srcS)); in iselF16Expr_wrk()
3386 HReg srcD = iselDblExpr(env, e->Iex.Binop.arg2); in iselF16Expr_wrk()
3387 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselF16Expr_wrk()
3388 HReg dstH = newVRegD(env); in iselF16Expr_wrk()
3389 addInstr(env, ARM64Instr_VCvtHD(False/*!hToD*/, dstH, srcD)); in iselF16Expr_wrk()
3407 ISelEnv* env, IRExpr* e ) in iselV256Expr() argument
3409 iselV256Expr_wrk( rHi, rLo, env, e ); in iselV256Expr()
3418 ISelEnv* env, IRExpr* e ) in iselV256Expr_wrk() argument
3421 IRType ty = typeOfIRExpr(env->type_env,e); in iselV256Expr_wrk()
3426 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp); in iselV256Expr_wrk()
3433 *rHi = iselV128Expr(env, e->Iex.Binop.arg1); in iselV256Expr_wrk()
3434 *rLo = iselV128Expr(env, e->Iex.Binop.arg2); in iselV256Expr_wrk()
3454 HReg argL = iselV128Expr(env, e->Iex.Binop.arg1); in iselV256Expr_wrk()
3455 HReg argR = iselV128Expr(env, e->Iex.Binop.arg2); in iselV256Expr_wrk()
3456 HReg fpsr = newVRegI(env); in iselV256Expr_wrk()
3457 HReg resHi = newVRegV(env); in iselV256Expr_wrk()
3458 HReg resLo = newVRegV(env); in iselV256Expr_wrk()
3483 addInstr(env, ARM64Instr_Imm64(fpsr, 0)); in iselV256Expr_wrk()
3484 addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr)); in iselV256Expr_wrk()
3485 addInstr(env, ARM64Instr_VBinV(op, resLo, argL, argR)); in iselV256Expr_wrk()
3486 addInstr(env, ARM64Instr_FPSR(False/*!toFPSR*/, fpsr)); in iselV256Expr_wrk()
3487 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27), in iselV256Expr_wrk()
3491 addInstr(env, ARM64Instr_Logic(fpsr, fpsr, ril_one, ARM64lo_AND)); in iselV256Expr_wrk()
3494 addInstr(env, ARM64Instr_VQfromX(resHi, fpsr)); in iselV256Expr_wrk()
3515 static void iselStmt ( ISelEnv* env, IRStmt* stmt ) in iselStmt() argument
3527 IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr); in iselStmt()
3528 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data); in iselStmt()
3535 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); in iselStmt()
3536 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd); in iselStmt()
3537 addInstr(env, ARM64Instr_LdSt64(False/*!isLoad*/, rD, am)); in iselStmt()
3541 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); in iselStmt()
3542 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd); in iselStmt()
3543 addInstr(env, ARM64Instr_LdSt32(False/*!isLoad*/, rD, am)); in iselStmt()
3547 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); in iselStmt()
3548 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd); in iselStmt()
3549 addInstr(env, ARM64Instr_LdSt16(False/*!isLoad*/, rD, am)); in iselStmt()
3553 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); in iselStmt()
3554 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd); in iselStmt()
3555 addInstr(env, ARM64Instr_LdSt8(False/*!isLoad*/, rD, am)); in iselStmt()
3559 HReg qD = iselV128Expr(env, stmt->Ist.Store.data); in iselStmt()
3560 HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr); in iselStmt()
3561 addInstr(env, ARM64Instr_VLdStQ(False/*!isLoad*/, qD, addr)); in iselStmt()
3565 HReg dD = iselDblExpr(env, stmt->Ist.Store.data); in iselStmt()
3566 HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr); in iselStmt()
3567 addInstr(env, ARM64Instr_VLdStD(False/*!isLoad*/, dD, addr, 0)); in iselStmt()
3571 HReg sD = iselFltExpr(env, stmt->Ist.Store.data); in iselStmt()
3572 HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr); in iselStmt()
3573 addInstr(env, ARM64Instr_VLdStS(False/*!isLoad*/, sD, addr, 0)); in iselStmt()
3582 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Put.data); in iselStmt()
3585 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); in iselStmt()
3587 addInstr(env, ARM64Instr_LdSt64(False/*!isLoad*/, rD, am)); in iselStmt()
3591 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); in iselStmt()
3593 addInstr(env, ARM64Instr_LdSt32(False/*!isLoad*/, rD, am)); in iselStmt()
3597 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); in iselStmt()
3599 addInstr(env, ARM64Instr_LdSt16(False/*!isLoad*/, rD, am)); in iselStmt()
3603 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); in iselStmt()
3605 addInstr(env, ARM64Instr_LdSt8(False/*!isLoad*/, rD, am)); in iselStmt()
3609 HReg qD = iselV128Expr(env, stmt->Ist.Put.data); in iselStmt()
3610 HReg addr = mk_baseblock_128bit_access_addr(env, offs); in iselStmt()
3611 addInstr(env, ARM64Instr_VLdStQ(False/*!isLoad*/, qD, addr)); in iselStmt()
3615 HReg dD = iselDblExpr(env, stmt->Ist.Put.data); in iselStmt()
3617 addInstr(env, ARM64Instr_VLdStD(False/*!isLoad*/, dD, bbp, offs)); in iselStmt()
3621 HReg sD = iselFltExpr(env, stmt->Ist.Put.data); in iselStmt()
3623 addInstr(env, ARM64Instr_VLdStS(False/*!isLoad*/, sD, bbp, offs)); in iselStmt()
3627 HReg hD = iselF16Expr(env, stmt->Ist.Put.data); in iselStmt()
3629 addInstr(env, ARM64Instr_VLdStH(False/*!isLoad*/, hD, bbp, offs)); in iselStmt()
3640 IRType ty = typeOfIRTemp(env->type_env, tmp); in iselStmt()
3644 HReg dst = lookupIRTemp(env, tmp); in iselStmt()
3645 HReg rD = iselIntExpr_R(env, stmt->Ist.WrTmp.data); in iselStmt()
3646 addInstr(env, ARM64Instr_MovI(dst, rD)); in iselStmt()
3660 HReg zero = newVRegI(env); in iselStmt()
3661 HReg one = newVRegI(env); in iselStmt()
3662 HReg dst = lookupIRTemp(env, tmp); in iselStmt()
3663 addInstr(env, ARM64Instr_Imm64(zero, 0)); in iselStmt()
3664 addInstr(env, ARM64Instr_Imm64(one, 1)); in iselStmt()
3665 ARM64CondCode cc = iselCondCode(env, stmt->Ist.WrTmp.data); in iselStmt()
3666 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc)); in iselStmt()
3670 HReg src = iselDblExpr(env, stmt->Ist.WrTmp.data); in iselStmt()
3671 HReg dst = lookupIRTemp(env, tmp); in iselStmt()
3672 addInstr(env, ARM64Instr_VMov(8, dst, src)); in iselStmt()
3676 HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data); in iselStmt()
3677 HReg dst = lookupIRTemp(env, tmp); in iselStmt()
3678 addInstr(env, ARM64Instr_VMov(8/*yes, really*/, dst, src)); in iselStmt()
3682 HReg src = iselV128Expr(env, stmt->Ist.WrTmp.data); in iselStmt()
3683 HReg dst = lookupIRTemp(env, tmp); in iselStmt()
3684 addInstr(env, ARM64Instr_VMov(16, dst, src)); in iselStmt()
3689 iselV256Expr(&srcHi,&srcLo, env, stmt->Ist.WrTmp.data); in iselStmt()
3690 lookupIRTempPair( &dstHi, &dstLo, env, tmp); in iselStmt()
3691 addInstr(env, ARM64Instr_VMov(16, dstHi, srcHi)); in iselStmt()
3692 addInstr(env, ARM64Instr_VMov(16, dstLo, srcLo)); in iselStmt()
3706 retty = typeOfIRTemp(env->type_env, d->tmp); in iselStmt()
3725 doHelperCall( &addToSp, &rloc, env, d->guard, d->cee, retty, d->args ); in iselStmt()
3742 HReg dst = lookupIRTemp(env, d->tmp); in iselStmt()
3743 addInstr(env, ARM64Instr_MovI(dst, hregARM64_X0()) ); in iselStmt()
3755 HReg dst = lookupIRTemp(env, d->tmp); in iselStmt()
3756 HReg tmp = newVRegI(env); // the address of the returned value in iselStmt()
3757 addInstr(env, ARM64Instr_FromSP(tmp)); // tmp = SP in iselStmt()
3758 addInstr(env, ARM64Instr_Arith(tmp, tmp, in iselStmt()
3761 addInstr(env, ARM64Instr_VLdStQ(True/*isLoad*/, dst, tmp)); in iselStmt()
3762 addInstr(env, ARM64Instr_AddToSP(addToSp)); in iselStmt()
3777 IRType ty = typeOfIRTemp(env->type_env, res); in iselStmt()
3781 HReg r_dst = lookupIRTemp(env, res); in iselStmt()
3782 HReg raddr = iselIntExpr_R(env, stmt->Ist.LLSC.addr); in iselStmt()
3790 addInstr(env, ARM64Instr_MovI(hregARM64_X4(), raddr)); in iselStmt()
3791 addInstr(env, ARM64Instr_LdrEX(szB)); in iselStmt()
3792 addInstr(env, ARM64Instr_MovI(r_dst, hregARM64_X2())); in iselStmt()
3798 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.LLSC.storedata); in iselStmt()
3802 HReg rD = iselIntExpr_R(env, stmt->Ist.LLSC.storedata); in iselStmt()
3803 HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr); in iselStmt()
3811 addInstr(env, ARM64Instr_MovI(hregARM64_X2(), rD)); in iselStmt()
3812 addInstr(env, ARM64Instr_MovI(hregARM64_X4(), rA)); in iselStmt()
3813 addInstr(env, ARM64Instr_StrEX(szB)); in iselStmt()
3821 IRType ty = typeOfIRTemp(env->type_env, res); in iselStmt()
3822 HReg r_res = lookupIRTemp(env, res); in iselStmt()
3826 addInstr(env, ARM64Instr_Logic(r_res, hregARM64_X0(), one, in iselStmt()
3829 addInstr(env, ARM64Instr_Logic(r_res, r_res, one, in iselStmt()
3840 addInstr(env, ARM64Instr_MFence()); in iselStmt()
3868 = iselCondCode(env, stmt->Ist.Exit.guard); in iselStmt()
3874 if (env->chainingAllowed) { in iselStmt()
3879 = ((Addr64)stmt->Ist.Exit.dst->Ico.U64) > env->max_ga; in iselStmt()
3881 addInstr(env, ARM64Instr_XDirect(stmt->Ist.Exit.dst->Ico.U64, in iselStmt()
3887 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst)); in iselStmt()
3888 addInstr(env, ARM64Instr_XAssisted(r, amPC, cc, Ijk_Boring)); in iselStmt()
3904 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst)); in iselStmt()
3905 addInstr(env, ARM64Instr_XAssisted(r, amPC, cc, in iselStmt()
3929 static void iselNext ( ISelEnv* env, in iselNext() argument
3947 if (env->chainingAllowed) { in iselNext()
3952 = ((Addr64)cdst->Ico.U64) > env->max_ga; in iselNext()
3954 addInstr(env, ARM64Instr_XDirect(cdst->Ico.U64, in iselNext()
3961 HReg r = iselIntExpr_R(env, next); in iselNext()
3962 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL, in iselNext()
3972 HReg r = iselIntExpr_R(env, next); in iselNext()
3974 if (env->chainingAllowed) { in iselNext()
3975 addInstr(env, ARM64Instr_XIndir(r, amPC, ARM64cc_AL)); in iselNext()
3977 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL, in iselNext()
3998 HReg r = iselIntExpr_R(env, next); in iselNext()
4000 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL, jk)); in iselNext()
4034 ISelEnv* env; in iselSB_ARM64() local
4048 env = LibVEX_Alloc_inline(sizeof(ISelEnv)); in iselSB_ARM64()
4049 env->vreg_ctr = 0; in iselSB_ARM64()
4052 env->code = newHInstrArray(); in iselSB_ARM64()
4055 env->type_env = bb->tyenv; in iselSB_ARM64()
4059 env->n_vregmap = bb->tyenv->types_used; in iselSB_ARM64()
4060 env->vregmap = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg)); in iselSB_ARM64()
4061 env->vregmapHI = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg)); in iselSB_ARM64()
4064 env->chainingAllowed = chainingAllowed; in iselSB_ARM64()
4065 env->hwcaps = hwcaps_host; in iselSB_ARM64()
4066 env->previous_rm = NULL; in iselSB_ARM64()
4067 env->max_ga = max_ga; in iselSB_ARM64()
4072 for (i = 0; i < env->n_vregmap; i++) { in iselSB_ARM64()
4099 env->vregmap[i] = hreg; in iselSB_ARM64()
4100 env->vregmapHI[i] = hregHI; in iselSB_ARM64()
4102 env->vreg_ctr = j; in iselSB_ARM64()
4107 addInstr(env, ARM64Instr_EvCheck(amCounter, amFailAddr)); in iselSB_ARM64()
4114 addInstr(env, ARM64Instr_ProfInc()); in iselSB_ARM64()
4119 iselStmt(env, bb->stmts[i]); in iselSB_ARM64()
4121 iselNext(env, bb->next, bb->jumpkind, bb->offsIP); in iselSB_ARM64()
4124 env->code->n_vregs = env->vreg_ctr; in iselSB_ARM64()
4125 return env->code; in iselSB_ARM64()