1435       switch (e->Iex.Binop.op) {  in iselWordExpr_R_wrk()
1453          HReg   r_srcL  = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1459                                       e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1463                                       e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1473       switch (e->Iex.Binop.op) {  in iselWordExpr_R_wrk()
1486          HReg   r_srcL  = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1492                ri_srcR = iselWordExpr_RH5u(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1494                ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1529       if (e->Iex.Binop.op == Iop_DivS32 ||   in iselWordExpr_R_wrk()
1530           e->Iex.Binop.op == Iop_DivU32 ||  in iselWordExpr_R_wrk()
1531           e->Iex.Binop.op == Iop_DivS32E ||  in iselWordExpr_R_wrk()
1532           e->Iex.Binop.op == Iop_DivU32E) {  in iselWordExpr_R_wrk()
1533          Bool syned  = toBool((e->Iex.Binop.op == Iop_DivS32) || (e->Iex.Binop.op == Iop_DivS32E));  in iselWordExpr_R_wrk()
1535          HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1536          HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1538                       PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivU32E )  in iselWordExpr_R_wrk()
1539                                              || ( e->Iex.Binop.op == Iop_DivS32E ) ) ? True  in iselWordExpr_R_wrk()
1548       if (e->Iex.Binop.op == Iop_DivS64 ||   in iselWordExpr_R_wrk()
1549           e->Iex.Binop.op == Iop_DivU64 || e->Iex.Binop.op == Iop_DivS64E  in iselWordExpr_R_wrk()
1550           || e->Iex.Binop.op == Iop_DivU64E ) {  in iselWordExpr_R_wrk()
1551          Bool syned  = toBool((e->Iex.Binop.op == Iop_DivS64) ||(e->Iex.Binop.op == Iop_DivS64E));  in iselWordExpr_R_wrk()
1553          HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1554          HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1557                       PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivS64E )  in iselWordExpr_R_wrk()
1558                                              || ( e->Iex.Binop.op  in iselWordExpr_R_wrk()
1570       if (e->Iex.Binop.op == Iop_Mul32  in iselWordExpr_R_wrk()
1571           || e->Iex.Binop.op == Iop_Mul64) {  in iselWordExpr_R_wrk()
1573          Bool sz32        = (e->Iex.Binop.op != Iop_Mul64);  in iselWordExpr_R_wrk()
1575          HReg r_srcL      = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1576          HReg r_srcR      = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1584           && (e->Iex.Binop.op == Iop_MullU32  in iselWordExpr_R_wrk()
1585               || e->Iex.Binop.op == Iop_MullS32)) {  in iselWordExpr_R_wrk()
1589          Bool syned  = toBool(e->Iex.Binop.op == Iop_MullS32);  in iselWordExpr_R_wrk()
1590          HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1591          HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1606       if (e->Iex.Binop.op == Iop_CmpORD32S  in iselWordExpr_R_wrk()
1607           || e->Iex.Binop.op == Iop_CmpORD32U) {  in iselWordExpr_R_wrk()
1608          Bool   syned = toBool(e->Iex.Binop.op == Iop_CmpORD32S);  in iselWordExpr_R_wrk()
1610          HReg   srcL  = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1611          PPCRH* srcR  = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2,  in iselWordExpr_R_wrk()
1621       if (e->Iex.Binop.op == Iop_CmpORD64S  in iselWordExpr_R_wrk()
1622           || e->Iex.Binop.op == Iop_CmpORD64U) {  in iselWordExpr_R_wrk()
1623          Bool   syned = toBool(e->Iex.Binop.op == Iop_CmpORD64S);  in iselWordExpr_R_wrk()
1625          HReg   srcL  = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1626          PPCRH* srcR  = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2,  in iselWordExpr_R_wrk()
1637       if (e->Iex.Binop.op == Iop_Max32U) {  in iselWordExpr_R_wrk()
1638          HReg        r1   = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1639          HReg        r2   = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1649       if (e->Iex.Binop.op == Iop_32HLto64) {  in iselWordExpr_R_wrk()
1650          HReg   r_Hi  = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1651          HReg   r_Lo  = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1667       if ((e->Iex.Binop.op == Iop_CmpF64) ||  in iselWordExpr_R_wrk()
1668           (e->Iex.Binop.op == Iop_CmpD64) ||  in iselWordExpr_R_wrk()
1669           (e->Iex.Binop.op == Iop_CmpD128)) {  in iselWordExpr_R_wrk()
1681          if (e->Iex.Binop.op == Iop_CmpF64) {  in iselWordExpr_R_wrk()
1682             fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1683             fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1686          } else if (e->Iex.Binop.op == Iop_CmpD64) {  in iselWordExpr_R_wrk()
1687             fr_srcL = iselDfp64Expr(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_R_wrk()
1688             fr_srcR = iselDfp64Expr(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1692             iselDfp128Expr(&fr_srcL, &fr_srcL_lo, env, e->Iex.Binop.arg1,  in iselWordExpr_R_wrk()
1694             iselDfp128Expr(&fr_srcR, &fr_srcR_lo, env, e->Iex.Binop.arg2,  in iselWordExpr_R_wrk()
1747       if ( e->Iex.Binop.op == Iop_F64toI32S ||  in iselWordExpr_R_wrk()
1748                e->Iex.Binop.op == Iop_F64toI32U ) {  in iselWordExpr_R_wrk()
1752          HReg      fsrc    = iselDblExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1757          set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselWordExpr_R_wrk()
1761                                        e->Iex.Binop.op == Iop_F64toI32S ? True/*syned*/  in iselWordExpr_R_wrk()
1779       if (e->Iex.Binop.op == Iop_F64toI64S || e->Iex.Binop.op == Iop_F64toI64U ) {  in iselWordExpr_R_wrk()
1783             HReg      fsrc    = iselDblExpr(env, e->Iex.Binop.arg2,  in iselWordExpr_R_wrk()
1789             set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselWordExpr_R_wrk()
1793                                           ( e->Iex.Binop.op == Iop_F64toI64S ) ? True  in iselWordExpr_R_wrk()
1806       if (e->Iex.Binop.op == Iop_D64toI64S ) {  in iselWordExpr_R_wrk()
1809          HReg      fr_src  = iselDfp64Expr(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_R_wrk()
1814          set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselWordExpr_R_wrk()
1827       if (e->Iex.Binop.op == Iop_D128toI64S ) {  in iselWordExpr_R_wrk()
1835          set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselWordExpr_R_wrk()
1836          iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2,  in iselWordExpr_R_wrk()
2550           && e->Iex.Binop.op == Iop_Add64  in iselWordExpr_AMode_wrk()
2551           && e->Iex.Binop.arg2->tag == Iex_Const  in iselWordExpr_AMode_wrk()
2552           && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64  in iselWordExpr_AMode_wrk()
2553           && (aligned4imm  ? uLong_is_4_aligned(e->Iex.Binop.arg2  in iselWordExpr_AMode_wrk()
2556           && uLong_fits_in_16_bits(e->Iex.Binop.arg2  in iselWordExpr_AMode_wrk()
2558          return PPCAMode_IR( (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U64,  in iselWordExpr_AMode_wrk()
2559                              iselWordExpr_R(env, e->Iex.Binop.arg1,  in iselWordExpr_AMode_wrk()
2565           && e->Iex.Binop.op == Iop_Add64) {  in iselWordExpr_AMode_wrk()
2566          HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_AMode_wrk()
2567          HReg r_idx  = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_AMode_wrk()
2577           && e->Iex.Binop.op == Iop_Add32  in iselWordExpr_AMode_wrk()
2578           && e->Iex.Binop.arg2->tag == Iex_Const  in iselWordExpr_AMode_wrk()
2579           && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32  in iselWordExpr_AMode_wrk()
2580           && uInt_fits_in_16_bits(e->Iex.Binop.arg2  in iselWordExpr_AMode_wrk()
2582          return PPCAMode_IR( (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32,  in iselWordExpr_AMode_wrk()
2583                              iselWordExpr_R(env, e->Iex.Binop.arg1,  in iselWordExpr_AMode_wrk()
2589           && e->Iex.Binop.op == Iop_Add32) {  in iselWordExpr_AMode_wrk()
2590          HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselWordExpr_AMode_wrk()
2591          HReg r_idx  = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselWordExpr_AMode_wrk()
2899        && (e->Iex.Binop.op == Iop_CmpEQ32  in iselCondCode_wrk()
2900            || e->Iex.Binop.op == Iop_CmpNE32  in iselCondCode_wrk()
2901            || e->Iex.Binop.op == Iop_CmpLT32S  in iselCondCode_wrk()
2902            || e->Iex.Binop.op == Iop_CmpLT32U  in iselCondCode_wrk()
2903            || e->Iex.Binop.op == Iop_CmpLE32S  in iselCondCode_wrk()
2904            || e->Iex.Binop.op == Iop_CmpLE32U)) {  in iselCondCode_wrk()
2905       Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S ||  in iselCondCode_wrk()
2906                     e->Iex.Binop.op == Iop_CmpLE32S);  in iselCondCode_wrk()
2907       HReg   r1  = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselCondCode_wrk()
2908       PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2, IEndianess);  in iselCondCode_wrk()
2912       switch (e->Iex.Binop.op) {  in iselCondCode_wrk()
2948        && (e->Iex.Binop.op == Iop_CmpEQ64  in iselCondCode_wrk()
2949            || e->Iex.Binop.op == Iop_CmpNE64  in iselCondCode_wrk()
2950            || e->Iex.Binop.op == Iop_CmpLT64S  in iselCondCode_wrk()
2951            || e->Iex.Binop.op == Iop_CmpLT64U  in iselCondCode_wrk()
2952            || e->Iex.Binop.op == Iop_CmpLE64S  in iselCondCode_wrk()
2953            || e->Iex.Binop.op == Iop_CmpLE64U)) {  in iselCondCode_wrk()
2954       Bool   syned = (e->Iex.Binop.op == Iop_CmpLT64S ||  in iselCondCode_wrk()
2955                       e->Iex.Binop.op == Iop_CmpLE64S);  in iselCondCode_wrk()
2956       HReg    r1 = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselCondCode_wrk()
2957       PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2, IEndianess);  in iselCondCode_wrk()
2962       switch (e->Iex.Binop.op) {  in iselCondCode_wrk()
2977        && e->Iex.Binop.op == Iop_CmpNE8  in iselCondCode_wrk()
2978        && isZeroU8(e->Iex.Binop.arg2)) {  in iselCondCode_wrk()
2979       HReg arg = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselCondCode_wrk()
3046       switch (e->Iex.Binop.op) {  in iselInt128Expr_wrk()
3052          Bool     syned   = toBool(e->Iex.Binop.op == Iop_MullS64);  in iselInt128Expr_wrk()
3053          HReg     r_srcL  = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselInt128Expr_wrk()
3054          HReg     r_srcR  = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselInt128Expr_wrk()
3068          *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselInt128Expr_wrk()
3069          *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselInt128Expr_wrk()
3131       IROp op_binop = e->Iex.Binop.op;  in iselInt128Expr_to_32x4_wrk()
3134          iselInt64Expr(rHi, rMedHi, env, e->Iex.Binop.arg1, IEndianess);  in iselInt128Expr_to_32x4_wrk()
3135          iselInt64Expr(rMedLo, rLo, env, e->Iex.Binop.arg2, IEndianess);  in iselInt128Expr_to_32x4_wrk()
3248       IROp op_binop = e->Iex.Binop.op;  in iselInt64Expr_wrk()
3256             HReg     r_srcL  = iselWordExpr_R(env, e->Iex.Binop.arg1,  in iselInt64Expr_wrk()
3258             HReg     r_srcR  = iselWordExpr_R(env, e->Iex.Binop.arg2,  in iselInt64Expr_wrk()
3280             iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1, IEndianess);  in iselInt64Expr_wrk()
3281             iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2, IEndianess);  in iselInt64Expr_wrk()
3294             iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1, IEndianess);  in iselInt64Expr_wrk()
3295             iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2, IEndianess);  in iselInt64Expr_wrk()
3307             *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselInt64Expr_wrk()
3308             *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselInt64Expr_wrk()
3318             HReg      fsrc    = iselDblExpr(env, e->Iex.Binop.arg2,  in iselInt64Expr_wrk()
3324             set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselInt64Expr_wrk()
3347             HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2, IEndianess);  in iselInt64Expr_wrk()
3351             set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselInt64Expr_wrk()
3373             set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselInt64Expr_wrk()
3374             iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2,  in iselInt64Expr_wrk()
3848    if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_I64UtoF32) {  in iselFltExpr_wrk()
3851          HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselFltExpr_wrk()
3856          set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselFltExpr_wrk()
3879          iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2, IEndianess);  in iselFltExpr_wrk()
3882          set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselFltExpr_wrk()
4059       switch (e->Iex.Binop.op) {  in iselDblExpr_wrk()
4065          HReg fr_src = iselDblExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselDblExpr_wrk()
4066          set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDblExpr_wrk()
4074       if (e->Iex.Binop.op == Iop_RoundF64toF32) {  in iselDblExpr_wrk()
4076          HReg r_src = iselDblExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselDblExpr_wrk()
4077          set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDblExpr_wrk()
4083       if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64) {  in iselDblExpr_wrk()
4086             HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselDblExpr_wrk()
4091             set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDblExpr_wrk()
4098                                           e->Iex.Binop.op == Iop_I64StoF64,  in iselDblExpr_wrk()
4115             iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2,  in iselDblExpr_wrk()
4119             set_FPU_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDblExpr_wrk()
4127                                           e->Iex.Binop.op == Iop_I64StoF64,  in iselDblExpr_wrk()
4268       if (e->Iex.Binop.op == Iop_D64toD32) {  in iselDfp32Expr_wrk()
4270          HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp32Expr_wrk()
4271          set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDfp32Expr_wrk()
4358          HReg fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselDfp64Expr_wrk()
4359          HReg fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp64Expr_wrk()
4375       switch (e->Iex.Binop.op) {  in iselDfp64Expr_wrk()
4386          set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDfp64Expr_wrk()
4387          iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2,  in iselDfp64Expr_wrk()
4394          PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1, IEndianess);  in iselDfp64Expr_wrk()
4401          fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp64Expr_wrk()
4406          HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp64Expr_wrk()
4407          set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDfp64Expr_wrk()
4415          set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDfp64Expr_wrk()
4420            HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp64Expr_wrk()
4427             iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Binop.arg2,  in iselDfp64Expr_wrk()
4439       switch (e->Iex.Binop.op) {  in iselDfp64Expr_wrk()
4446          HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg1, IEndianess);  in iselDfp64Expr_wrk()
4447          PPCRI* shift = iselWordExpr_RI(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp64Expr_wrk()
4456       switch (e->Iex.Binop.op) {  in iselDfp64Expr_wrk()
4464          HReg fr_srcR = iselDfp64Expr(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp64Expr_wrk()
4470             HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselDfp64Expr_wrk()
4479             iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Binop.arg1,  in iselDfp64Expr_wrk()
4632       switch (e->Iex.Binop.op) {  in iselDfp128Expr_wrk()
4634          r_srcHi = iselDfp64Expr( env, e->Iex.Binop.arg1, IEndianess );  in iselDfp128Expr_wrk()
4635          r_srcLo = iselDfp64Expr( env, e->Iex.Binop.arg2, IEndianess );  in iselDfp128Expr_wrk()
4644          set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1, IEndianess );  in iselDfp128Expr_wrk()
4645          iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2,  in iselDfp128Expr_wrk()
4660          PPCRI* shift = iselWordExpr_RI(env, e->Iex.Binop.arg2, IEndianess);  in iselDfp128Expr_wrk()
4663          iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg1,  in iselDfp128Expr_wrk()
4666          if (e->Iex.Binop.op == Iop_ShrD128)  in iselDfp128Expr_wrk()
4679          PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1, IEndianess);  in iselDfp128Expr_wrk()
4682          iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2,  in iselDfp128Expr_wrk()
4699          iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2,  in iselDfp128Expr_wrk()
4704             HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselDfp128Expr_wrk()
4726                      (Int)e->Iex.Binop.op );  in iselDfp128Expr_wrk()
5072       switch (e->Iex.Binop.op) {  in iselVecExpr_wrk()
5090             iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5094             iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5104             HReg     rHi = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5105             HReg     rLo = iselWordExpr_R(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5140          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5141          HReg argR = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5148          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5149          HReg argR = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5173          HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5174          HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5205          HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5206          HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5240          HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5241          HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5278          HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5279          HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5305          HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5306          HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5315          HReg r_src  = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5317          HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5326          HReg r_src  = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5328          HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5337          HReg r_src  = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5339          HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5348          HReg r_src  = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5350          HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5359          HReg r_src  = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5360          HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5368          HReg v_src = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5369          HReg v_ctl = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5379          HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5380          HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()
5389          HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1, IEndianess);  in iselVecExpr_wrk()
5391          PPCRI* s_field = iselWordExpr_RI(env, e->Iex.Binop.arg2, IEndianess);  in iselVecExpr_wrk()