371     vex_printf("%s ",  tilegxAcasOp[instr->GXin.Acas.op]);  in ppTILEGXInstr()
372     ppHRegTILEGX(instr->GXin.Acas.old);  in ppTILEGXInstr()
374     if (instr->GXin.Acas.op == GXacas_CMPEXCH) {  in ppTILEGXInstr()
375       ppHRegTILEGX(instr->GXin.Acas.exp);  in ppTILEGXInstr()
378     ppHRegTILEGX(instr->GXin.Acas.new);  in ppTILEGXInstr()
773   i->GXin.Acas.op = op;  in TILEGXInstr_Acas()
774   i->GXin.Acas.old = old;  in TILEGXInstr_Acas()
775   i->GXin.Acas.addr = addr;  in TILEGXInstr_Acas()
776   i->GXin.Acas.exp = exp;  in TILEGXInstr_Acas()
777   i->GXin.Acas.new = new;  in TILEGXInstr_Acas()
778   i->GXin.Acas.sz = sz;  in TILEGXInstr_Acas()
961     addHRegUse(u, HRmRead, i->GXin.Acas.addr);  in getRegUsage_TILEGXInstr()
962     addHRegUse(u, HRmRead, i->GXin.Acas.new);  in getRegUsage_TILEGXInstr()
963     if (i->GXin.Acas.op == GXacas_CMPEXCH)  in getRegUsage_TILEGXInstr()
964       addHRegUse(u, HRmRead, i->GXin.Acas.exp);  in getRegUsage_TILEGXInstr()
965     addHRegUse(u, HRmWrite, i->GXin.Acas.old);  in getRegUsage_TILEGXInstr()
1109     mapReg(m, &i->GXin.Acas.old);  in mapRegs_TILEGXInstr()
1110     mapReg(m, &i->GXin.Acas.addr);  in mapRegs_TILEGXInstr()
1111     mapReg(m, &i->GXin.Acas.new);  in mapRegs_TILEGXInstr()
1112     if (i->GXin.Acas.op == GXacas_CMPEXCH)  in mapRegs_TILEGXInstr()
1113       mapReg(m, &i->GXin.Acas.exp);  in mapRegs_TILEGXInstr()
1956     UInt sz =  i->GXin.Acas.sz;  in emit_TILEGXInstr()
1957     UInt old = iregNo(i->GXin.Acas.old);  in emit_TILEGXInstr()
1958     UInt addr= iregNo(i->GXin.Acas.addr);  in emit_TILEGXInstr()
1959     UInt new = iregNo(i->GXin.Acas.new);  in emit_TILEGXInstr()
1961     switch (i->GXin.Acas.op) {  in emit_TILEGXInstr()
1964         UInt exp = iregNo(i->GXin.Acas.exp);  in emit_TILEGXInstr()