Lines Matching refs:ARM64FN
138 #define ARM64FN(f) f macro
141 #define ARM64FN(f) NULL macro
518 rRegUniv = ARM64FN(getRRegUniverse_ARM64()); in LibVEX_Translate()
519 isMove = (__typeof__(isMove)) ARM64FN(isMove_ARM64Instr); in LibVEX_Translate()
521 = (__typeof__(getRegUsage)) ARM64FN(getRegUsage_ARM64Instr); in LibVEX_Translate()
522 mapRegs = (__typeof__(mapRegs)) ARM64FN(mapRegs_ARM64Instr); in LibVEX_Translate()
523 genSpill = (__typeof__(genSpill)) ARM64FN(genSpill_ARM64); in LibVEX_Translate()
524 genReload = (__typeof__(genReload)) ARM64FN(genReload_ARM64); in LibVEX_Translate()
525 ppInstr = (__typeof__(ppInstr)) ARM64FN(ppARM64Instr); in LibVEX_Translate()
526 ppReg = (__typeof__(ppReg)) ARM64FN(ppHRegARM64); in LibVEX_Translate()
527 iselSB = ARM64FN(iselSB_ARM64); in LibVEX_Translate()
528 emit = (__typeof__(emit)) ARM64FN(emit_ARM64Instr); in LibVEX_Translate()
726 = ARM64FN(guest_arm64_state_requires_precise_mem_exns); in LibVEX_Translate()
727 disInstrFn = ARM64FN(disInstr_ARM64); in LibVEX_Translate()
728 specHelper = ARM64FN(guest_arm64_spechelper); in LibVEX_Translate()
731 guest_layout = ARM64FN(&arm64Guest_layout); in LibVEX_Translate()