Lines Matching refs:single_bit_field

193   uint32_t Encode(int single_bit_field, int four_bit_field_lowest_bit) const {  in Encode()  argument
195 return ((GetCode() & 0x1) << single_bit_field) | in Encode()
198 return ((GetCode() & 0x1) << single_bit_field) | in Encode()
204 int single_bit_field, in ExtractSRegister() argument
206 VIXL_ASSERT(single_bit_field > 0); in ExtractSRegister()
208 return ((instr << 1) & 0x1e) | ((instr >> single_bit_field) & 0x1); in ExtractSRegister()
211 ((instr >> single_bit_field) & 0x1); in ExtractSRegister()
229 uint32_t Encode(int single_bit_field, int four_bit_field_lowest_bit) const { in Encode() argument
230 VIXL_ASSERT(single_bit_field >= 4); in Encode()
231 return ((GetCode() & 0x10) << (single_bit_field - 4)) | in Encode()
237 int single_bit_field, in ExtractDRegister() argument
239 VIXL_ASSERT(single_bit_field >= 4); in ExtractDRegister()
240 return ((instr >> (single_bit_field - 4)) & 0x10) | in ExtractDRegister()
330 int single_bit_field, in EncodeX() argument
332 VIXL_ASSERT(single_bit_field >= 4); in EncodeX()
334 return ((value & 0x10) << (single_bit_field - 4)) | in EncodeX()
341 int single_bit_field, in ExtractDRegisterAndLane() argument
344 VIXL_ASSERT(single_bit_field >= 4); in ExtractDRegisterAndLane()
345 uint32_t value = ((instr >> (single_bit_field - 4)) & 0x10) | in ExtractDRegisterAndLane()
380 uint32_t Encode(int single_bit_field, int four_bit_field_lowest_bit) { in Encode() argument
382 VIXL_ASSERT(single_bit_field >= 3); in Encode()
383 return ((GetCode() & 0x8) << (single_bit_field - 3)) | in Encode()
389 int single_bit_field, in ExtractQRegister() argument
391 VIXL_ASSERT(single_bit_field >= 3); in ExtractQRegister()
392 return ((instr >> (single_bit_field - 3)) & 0x8) | in ExtractQRegister()