2369 void Assembler::fcvtzs(const Register& rd, const VRegister& vn, int fbits) {  in NEON_FP2REGMISC_FCVT_LIST()
2371   VIXL_ASSERT((fbits >= 0) && (fbits <= rd.GetSizeInBits()));  in NEON_FP2REGMISC_FCVT_LIST()
2372   if (fbits == 0) {  in NEON_FP2REGMISC_FCVT_LIST()
2375     Emit(SF(rd) | FPType(vn) | FCVTZS_fixed | FPScale(64 - fbits) | Rn(vn) |  in NEON_FP2REGMISC_FCVT_LIST()
2381 void Assembler::fcvtzs(const VRegister& vd, const VRegister& vn, int fbits) {  in fcvtzs()  argument
2382   VIXL_ASSERT(fbits >= 0);  in fcvtzs()
2383   if (fbits == 0) {  in fcvtzs()
2387     NEONShiftRightImmediate(vd, vn, fbits, NEON_FCVTZS_imm);  in fcvtzs()
2392 void Assembler::fcvtzu(const Register& rd, const VRegister& vn, int fbits) {  in fcvtzu()  argument
2394   VIXL_ASSERT((fbits >= 0) && (fbits <= rd.GetSizeInBits()));  in fcvtzu()
2395   if (fbits == 0) {  in fcvtzu()
2398     Emit(SF(rd) | FPType(vn) | FCVTZU_fixed | FPScale(64 - fbits) | Rn(vn) |  in fcvtzu()
2404 void Assembler::fcvtzu(const VRegister& vd, const VRegister& vn, int fbits) {  in fcvtzu()  argument
2405   VIXL_ASSERT(fbits >= 0);  in fcvtzu()
2406   if (fbits == 0) {  in fcvtzu()
2410     NEONShiftRightImmediate(vd, vn, fbits, NEON_FCVTZU_imm);  in fcvtzu()
2414 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) {  in ucvtf()  argument
2415   VIXL_ASSERT(fbits >= 0);  in ucvtf()
2416   if (fbits == 0) {  in ucvtf()
2420     NEONShiftRightImmediate(vd, vn, fbits, NEON_UCVTF_imm);  in ucvtf()
2424 void Assembler::scvtf(const VRegister& vd, const VRegister& vn, int fbits) {  in scvtf()  argument
2425   VIXL_ASSERT(fbits >= 0);  in scvtf()
2426   if (fbits == 0) {  in scvtf()
2430     NEONShiftRightImmediate(vd, vn, fbits, NEON_SCVTF_imm);  in scvtf()
2435 void Assembler::scvtf(const VRegister& vd, const Register& rn, int fbits) {  in scvtf()  argument
2437   VIXL_ASSERT(fbits >= 0);  in scvtf()
2438   if (fbits == 0) {  in scvtf()
2441     Emit(SF(rn) | FPType(vd) | SCVTF_fixed | FPScale(64 - fbits) | Rn(rn) |  in scvtf()
2447 void Assembler::ucvtf(const VRegister& vd, const Register& rn, int fbits) {  in ucvtf()  argument
2449   VIXL_ASSERT(fbits >= 0);  in ucvtf()
2450   if (fbits == 0) {  in ucvtf()
2453     Emit(SF(rn) | FPType(vd) | UCVTF_fixed | FPScale(64 - fbits) | Rn(rn) |  in ucvtf()