Lines Matching refs:wm
738 const Register& wm) { in crc32b() argument
739 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && wm.Is32Bits()); in crc32b()
740 Emit(SF(wm) | Rm(wm) | CRC32B | Rn(wn) | Rd(wd)); in crc32b()
746 const Register& wm) { in crc32h() argument
747 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && wm.Is32Bits()); in crc32h()
748 Emit(SF(wm) | Rm(wm) | CRC32H | Rn(wn) | Rd(wd)); in crc32h()
754 const Register& wm) { in crc32w() argument
755 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && wm.Is32Bits()); in crc32w()
756 Emit(SF(wm) | Rm(wm) | CRC32W | Rn(wn) | Rd(wd)); in crc32w()
770 const Register& wm) { in crc32cb() argument
771 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && wm.Is32Bits()); in crc32cb()
772 Emit(SF(wm) | Rm(wm) | CRC32CB | Rn(wn) | Rd(wd)); in crc32cb()
778 const Register& wm) { in crc32ch() argument
779 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && wm.Is32Bits()); in crc32ch()
780 Emit(SF(wm) | Rm(wm) | CRC32CH | Rn(wn) | Rd(wd)); in crc32ch()
786 const Register& wm) { in crc32cw() argument
787 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && wm.Is32Bits()); in crc32cw()
788 Emit(SF(wm) | Rm(wm) | CRC32CW | Rn(wn) | Rd(wd)); in crc32cw()
834 const Register& wm, in umaddl() argument
837 VIXL_ASSERT(wn.Is32Bits() && wm.Is32Bits()); in umaddl()
838 DataProcessing3Source(xd, wn, wm, xa, UMADDL_x); in umaddl()
844 const Register& wm, in smaddl() argument
847 VIXL_ASSERT(wn.Is32Bits() && wm.Is32Bits()); in smaddl()
848 DataProcessing3Source(xd, wn, wm, xa, SMADDL_x); in smaddl()
854 const Register& wm, in umsubl() argument
857 VIXL_ASSERT(wn.Is32Bits() && wm.Is32Bits()); in umsubl()
858 DataProcessing3Source(xd, wn, wm, xa, UMSUBL_x); in umsubl()
864 const Register& wm, in smsubl() argument
867 VIXL_ASSERT(wn.Is32Bits() && wm.Is32Bits()); in smsubl()
868 DataProcessing3Source(xd, wn, wm, xa, SMSUBL_x); in smsubl()
874 const Register& wm) { in smull() argument
876 VIXL_ASSERT(wn.Is32Bits() && wm.Is32Bits()); in smull()
877 DataProcessing3Source(xd, wn, wm, xzr, SMADDL_x); in smull()