| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 24 #define CASE_SSE_INS_COMMON(Inst, src) \ argument
27 #define CASE_AVX_INS_COMMON(Inst, Suffix, src) \ argument
30 #define CASE_MASK_INS_COMMON(Inst, Suffix, src) \ argument
33 #define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \ argument
36 #define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \ argument
41 #define CASE_MOVDUP(Inst, src) \ argument
49 #define CASE_MASK_MOVDUP(Inst, src) \ argument
54 #define CASE_MASKZ_MOVDUP(Inst, src) \ argument
59 #define CASE_PMOVZX(Inst, src) \ argument
67 #define CASE_MASK_PMOVZX(Inst, src) \ argument
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| /external/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 77 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
87 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass()
93 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass()
99 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass()
105 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR128BitRegisterClass()
111 static DecodeStatus DecodeADDR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeADDR64BitRegisterClass()
117 static DecodeStatus DecodeFP32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP32BitRegisterClass()
123 static DecodeStatus DecodeFP64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP64BitRegisterClass()
129 static DecodeStatus DecodeFP128BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP128BitRegisterClass()
135 static DecodeStatus DecodeVR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVR32BitRegisterClass()
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 265 static DecodeStatus DecodeFPR128RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR128RegisterClass()
276 static DecodeStatus DecodeFPR128_loRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR128_loRegisterClass()
294 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR64RegisterClass()
315 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR32RegisterClass()
336 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR16RegisterClass()
357 static DecodeStatus DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR8RegisterClass()
378 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64RegisterClass()
389 static DecodeStatus DecodeGPR64spRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64spRegisterClass()
411 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32RegisterClass()
422 static DecodeStatus DecodeGPR32spRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32spRegisterClass()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 34 virtual bool isBranch(const MCInst &Inst) const { in isBranch()
38 virtual bool isConditionalBranch(const MCInst &Inst) const { in isConditionalBranch()
42 virtual bool isUnconditionalBranch(const MCInst &Inst) const { in isUnconditionalBranch()
46 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch()
50 virtual bool isCall(const MCInst &Inst) const { in isCall()
54 virtual bool isReturn(const MCInst &Inst) const { in isReturn()
58 virtual bool isTerminator(const MCInst &Inst) const { in isTerminator()
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| /external/llvm/lib/Analysis/ |
| D | CFLGraph.h | 225 void visitReturnInst(ReturnInst &Inst) { in visitReturnInst()
234 void visitPtrToIntInst(PtrToIntInst &Inst) { in visitPtrToIntInst()
239 void visitIntToPtrInst(IntToPtrInst &Inst) { in visitIntToPtrInst()
244 void visitCastInst(CastInst &Inst) { in visitCastInst()
249 void visitBinaryOperator(BinaryOperator &Inst) { in visitBinaryOperator()
256 void visitAtomicCmpXchgInst(AtomicCmpXchgInst &Inst) { in visitAtomicCmpXchgInst()
262 void visitAtomicRMWInst(AtomicRMWInst &Inst) { in visitAtomicRMWInst()
268 void visitPHINode(PHINode &Inst) { in visitPHINode()
273 void visitGetElementPtrInst(GetElementPtrInst &Inst) { in visitGetElementPtrInst()
278 void visitSelectInst(SelectInst &Inst) { in visitSelectInst()
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 403 static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, in DecodeUImmWithOffset()
1126 static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, in DecodeCPU16RegsRegisterClass()
1135 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, in DecodeGPR64RegisterClass()
1148 static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, in DecodeGPRMM16RegisterClass()
1159 static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, in DecodeGPRMM16ZeroRegisterClass()
1170 static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst &Inst, in DecodeGPRMM16MovePRegisterClass()
1181 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, in DecodeGPR32RegisterClass()
1192 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, in DecodePtrRegisterClass()
1202 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, in DecodeDSPRRegisterClass()
1209 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, in DecodeFGR64RegisterClass()
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 208 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
215 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass()
221 static DecodeStatus DecodeCRRC0RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRC0RegisterClass()
227 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass()
233 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass()
239 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass()
245 static DecodeStatus DecodeVRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVRRCRegisterClass()
251 static DecodeStatus DecodeVSRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVSRCRegisterClass()
257 static DecodeStatus DecodeVSFRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVSFRCRegisterClass()
263 static DecodeStatus DecodeVSSRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVSSRCRegisterClass()
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 31 virtual bool isBranch(const MCInst &Inst) const { in isBranch()
35 virtual bool isConditionalBranch(const MCInst &Inst) const { in isConditionalBranch()
39 virtual bool isUnconditionalBranch(const MCInst &Inst) const { in isUnconditionalBranch()
43 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch()
47 virtual bool isCall(const MCInst &Inst) const { in isCall()
51 virtual bool isReturn(const MCInst &Inst) const { in isReturn()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 851 static DecodeStatus DecodeGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass()
862 DecodeGPRnopcRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodeGPRnopcRegisterClass()
868 static DecodeStatus DecodetGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodetGPRRegisterClass()
875 static DecodeStatus DecodetcGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodetcGPRRegisterClass()
905 static DecodeStatus DecoderGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecoderGPRRegisterClass()
922 static DecodeStatus DecodeSPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodeSPRRegisterClass()
943 static DecodeStatus DecodeDPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodeDPRRegisterClass()
953 static DecodeStatus DecodeDPR_8RegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodeDPR_8RegisterClass()
961 DecodeDPR_VFP2RegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodeDPR_VFP2RegisterClass()
976 static DecodeStatus DecodeQPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, in DecodeQPRRegisterClass()
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 881 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass()
892 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRnopcRegisterClass()
905 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRwithAPSRRegisterClass()
919 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetGPRRegisterClass()
931 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRPairRegisterClass()
946 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetcGPRRegisterClass()
976 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecoderGPRRegisterClass()
1001 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeSPRRegisterClass()
1022 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPRRegisterClass()
1037 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPR_8RegisterClass()
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 199 static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, in DecodeGRRegsRegisterClass()
211 static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, in DecodeRRegsRegisterClass()
223 static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, in DecodeBitpOperand()
234 static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, in DecodeNegImmOperand()
275 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2OpInstructionFail()
345 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RInstruction()
358 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RImmInstruction()
371 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeR2RInstruction()
384 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RSrcDstInstruction()
398 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeRUSInstruction()
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 152 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, in DecodeIntRegsRegisterClass()
163 static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst, in DecodeI64RegsRegisterClass()
175 static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst, in DecodeFPRegsRegisterClass()
187 static DecodeStatus DecodeDFPRegsRegisterClass(MCInst &Inst, in DecodeDFPRegsRegisterClass()
199 static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, in DecodeQFPRegsRegisterClass()
213 static DecodeStatus DecodeCPRegsRegisterClass(MCInst &Inst, in DecodeCPRegsRegisterClass()
224 static DecodeStatus DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFCCRegsRegisterClass()
233 static DecodeStatus DecodeASRRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeASRRegsRegisterClass()
242 static DecodeStatus DecodePRRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodePRRegsRegisterClass()
251 static DecodeStatus DecodeIntPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeIntPairRegisterClass()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 916 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
926 void addCondCodeOperands(MCInst &Inst, unsigned N) const { in addCondCodeOperands()
933 void addCoprocNumOperands(MCInst &Inst, unsigned N) const { in addCoprocNumOperands()
938 void addCoprocRegOperands(MCInst &Inst, unsigned N) const { in addCoprocRegOperands()
943 void addCoprocOptionOperands(MCInst &Inst, unsigned N) const { in addCoprocOptionOperands()
948 void addITMaskOperands(MCInst &Inst, unsigned N) const { in addITMaskOperands()
953 void addITCondCodeOperands(MCInst &Inst, unsigned N) const { in addITCondCodeOperands()
958 void addCCOutOperands(MCInst &Inst, unsigned N) const { in addCCOutOperands()
963 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
968 void addRegShiftedRegOperands(MCInst &Inst, unsigned N) const { in addRegShiftedRegOperands()
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| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCCodeEmitter.cpp | 113 const MCInst &Inst, const MCOperand &MCOp, SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
138 unsigned adjustPqBits(const MCInst &Inst, unsigned Value, unsigned PBitShift, in adjustPqBits()
164 LanaiMCCodeEmitter::adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value, in adjustPqBitsRmAndRrm()
170 LanaiMCCodeEmitter::adjustPqBitsSpls(const MCInst &Inst, unsigned Value, in adjustPqBitsSpls()
176 const MCInst &Inst, raw_ostream &Ostream, SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
189 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getRiMemoryOpValue()
221 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getRrMemoryOpValue()
259 LanaiMCCodeEmitter::getSplsOpValue(const MCInst &Inst, unsigned OpNo, in getSplsOpValue()
292 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getCallTargetOpValue()
305 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue()
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | IRTranslator.cpp | 64 bool IRTranslator::translateBinaryOp(unsigned Opcode, const Instruction &Inst) { in translateBinaryOp()
76 bool IRTranslator::translateReturn(const Instruction &Inst) { in translateReturn()
85 bool IRTranslator::translateBr(const Instruction &Inst) { in translateBr()
102 bool IRTranslator::translate(const Instruction &Inst) { in translate()
150 for (const Instruction &Inst: BB) { in runOnMachineFunction() local
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1149 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
1159 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
1164 void addGPR32as64Operands(MCInst &Inst, unsigned N) const { in addGPR32as64Operands()
1176 void addVectorReg64Operands(MCInst &Inst, unsigned N) const { in addVectorReg64Operands()
1183 void addVectorReg128Operands(MCInst &Inst, unsigned N) const { in addVectorReg128Operands()
1190 void addVectorRegLoOperands(MCInst &Inst, unsigned N) const { in addVectorRegLoOperands()
1196 void addVectorList64Operands(MCInst &Inst, unsigned N) const { in addVectorList64Operands()
1209 void addVectorList128Operands(MCInst &Inst, unsigned N) const { in addVectorList128Operands()
1221 void addVectorIndex1Operands(MCInst &Inst, unsigned N) const { in addVectorIndex1Operands()
1226 void addVectorIndexBOperands(MCInst &Inst, unsigned N) const { in addVectorIndexBOperands()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsAnalyzeImmediate.h | 19 struct Inst { struct
21 Inst(unsigned Opc, unsigned ImmOpnd); argument
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AddressTypePromotion.cpp | 156 bool AArch64AddressTypePromotion::canGetThrough(const Instruction *Inst) { in canGetThrough()
179 bool AArch64AddressTypePromotion::shouldGetThrough(const Instruction *Inst) { in shouldGetThrough()
208 static bool shouldSExtOperand(const Instruction *Inst, int OpIdx) { in shouldSExtOperand()
270 while (auto *Inst = dyn_cast<Instruction>(SExt->getOperand(0))) { in propagateSignExtension() local
439 const Instruction *Inst = dyn_cast<GetElementPtrInst>(U); in analyzeSExtension() local
450 Instruction *Inst = SExt; in analyzeSExtension() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1739 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
1749 void addARMBranchTargetOperands(MCInst &Inst, unsigned N) const { in addARMBranchTargetOperands()
1754 void addThumbBranchTargetOperands(MCInst &Inst, unsigned N) const { in addThumbBranchTargetOperands()
1759 void addCondCodeOperands(MCInst &Inst, unsigned N) const { in addCondCodeOperands()
1766 void addCoprocNumOperands(MCInst &Inst, unsigned N) const { in addCoprocNumOperands()
1771 void addCoprocRegOperands(MCInst &Inst, unsigned N) const { in addCoprocRegOperands()
1776 void addCoprocOptionOperands(MCInst &Inst, unsigned N) const { in addCoprocOptionOperands()
1781 void addITMaskOperands(MCInst &Inst, unsigned N) const { in addITMaskOperands()
1786 void addITCondCodeOperands(MCInst &Inst, unsigned N) const { in addITCondCodeOperands()
1791 void addCCOutOperands(MCInst &Inst, unsigned N) const { in addCCOutOperands()
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| /external/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 163 DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass()
173 static DecodeStatus decodeRiMemoryValue(MCInst &Inst, unsigned Insn, in decodeRiMemoryValue()
185 static DecodeStatus decodeRrMemoryValue(MCInst &Inst, unsigned Insn, in decodeRrMemoryValue()
197 static DecodeStatus decodeSplsValue(MCInst &Inst, unsigned Insn, in decodeSplsValue()
226 static DecodeStatus decodeShiftImm(MCInst &Inst, unsigned Insn, in decodeShiftImm()
234 static DecodeStatus decodePredicateOperand(MCInst &Inst, unsigned Val, in decodePredicateOperand()
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| /external/llvm/utils/TableGen/ |
| D | InstrInfoEmitter.cpp | 88 InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) { in GetOperandInfo()
180 for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) { in EmitOperandInfo() local
207 for (const CodeGenInstruction *Inst : NumberedInstructions) { in initOperandMapData() local
360 Record *Inst = II->TheDef; in run() local
386 for (const CodeGenInstruction *Inst : NumberedInstructions) { in run() local
402 for (const CodeGenInstruction *Inst : NumberedInstructions) { in run() local
460 void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, in emitRecord()
581 for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) in emitEnums() local
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| /external/llvm/lib/Transforms/Instrumentation/ |
| D | IndirectCallPromotion.cpp | 216 ICallPromotionFunc::isPromotionLegal(Instruction *Inst, uint64_t Target, in isPromotionLegal()
258 Instruction *Inst, const ArrayRef<InstrProfValueData> &ValueDataRef, in getPromotionCandidatesForCallSite()
311 static void createIfThenElse(Instruction *Inst, Function *DirectCallee, in createIfThenElse()
358 static bool getCallRetPHINode(BasicBlock *BB, Instruction *Inst) { in getCallRetPHINode()
380 static void fixupPHINodeForUnwind(Instruction *Inst, BasicBlock *BB, in fixupPHINodeForUnwind()
402 static void fixupPHINodeForNormalDest(Instruction *Inst, BasicBlock *BB, in fixupPHINodeForNormalDest()
424 static Instruction *insertCallRetCast(const Instruction *Inst, in insertCallRetCast()
453 static Instruction *createDirectCallInst(const Instruction *Inst, in createDirectCallInst()
494 static void insertCallRetPHI(Instruction *Inst, Instruction *CallResult, in insertCallRetPHI()
527 void ICallPromotionFunc::promote(Instruction *Inst, Function *DirectCallee, in promote()
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| /external/llvm/lib/Transforms/ObjCARC/ |
| D | DependencyAnalysis.cpp | 35 bool llvm::objcarc::CanAlterRefCount(const Instruction *Inst, const Value *Ptr, in CanAlterRefCount()
71 bool llvm::objcarc::CanDecrementRefCount(const Instruction *Inst, in CanDecrementRefCount()
85 bool llvm::objcarc::CanUse(const Instruction *Inst, const Value *Ptr, in CanUse()
135 llvm::objcarc::Depends(DependenceKind Flavor, Instruction *Inst, in Depends()
255 Instruction *Inst = &*--LocalStartPos; in FindDependencies() local
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| /external/llvm/lib/Transforms/Scalar/ |
| D | Sink.cpp | 37 static bool AllUsesDominatedByBlock(Instruction *Inst, BasicBlock *BB, in AllUsesDominatedByBlock()
60 static bool isSafeToMove(Instruction *Inst, AliasAnalysis &AA, in isSafeToMove()
95 static bool IsAcceptableTarget(Instruction *Inst, BasicBlock *SuccToSinkTo, in IsAcceptableTarget()
139 static bool SinkInstruction(Instruction *Inst, in SinkInstruction()
218 Instruction *Inst = &*I; // The instruction to sink. in ProcessBlock() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 800 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
810 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
817 void addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPR32AsmRegOperands()
822 void addGPRMM16AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegOperands()
827 void addGPRMM16AsmRegZeroOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegZeroOperands()
832 void addGPRMM16AsmRegMovePOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegMovePOperands()
840 void addGPR64AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPR64AsmRegOperands()
845 void addAFGR64AsmRegOperands(MCInst &Inst, unsigned N) const { in addAFGR64AsmRegOperands()
850 void addFGR64AsmRegOperands(MCInst &Inst, unsigned N) const { in addFGR64AsmRegOperands()
855 void addFGR32AsmRegOperands(MCInst &Inst, unsigned N) const { in addFGR32AsmRegOperands()
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