1 /** @file
2 *
3 *  Copyright (c) 2013-2014, ARM Limited. All rights reserved.
4 *
5 *  This program and the accompanying materials
6 *  are licensed and made available under the terms and conditions of the BSD License
7 *  which accompanies this distribution.  The full text of the license may be found at
8 *  http://opensource.org/licenses/bsd-license.php
9 *
10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 *
13 **/
14 
15 #ifndef __ARM_JUNO_H__
16 #define __ARM_JUNO_H__
17 
18 #include <VExpressMotherBoard.h>
19 
20 /***********************************************************************************
21 // Platform Memory Map
22 ************************************************************************************/
23 
24 // Motherboard Peripheral and On-chip peripheral
25 #define ARM_VE_BOARD_PERIPH_BASE              0x1C010000
26 
27 // NOR Flash 0
28 #define ARM_VE_SMB_NOR0_BASE                  0x08000000
29 #define ARM_VE_SMB_NOR0_SZ                    SIZE_64MB
30 
31 // Off-Chip peripherals (USB, Ethernet, VRAM)
32 #define ARM_VE_SMB_PERIPH_BASE                0x18000000
33 #define ARM_VE_SMB_PERIPH_SZ                  (SIZE_64MB + SIZE_2MB)
34 
35 // On-Chip non-secure ROM
36 #define ARM_JUNO_NON_SECURE_ROM_BASE          0x1F000000
37 #define ARM_JUNO_NON_SECURE_ROM_SZ            SIZE_16MB
38 
39 // On-Chip Peripherals
40 #define ARM_JUNO_PERIPHERALS_BASE             0x20000000
41 #define ARM_JUNO_PERIPHERALS_SZ               0x0E000000
42 
43 // PCIe MSI address window
44 #define ARM_JUNO_GIV2M_MSI_BASE               0x2c1c0000
45 #define ARM_JUNO_GIV2M_MSI_SZ                 SIZE_256KB
46 
47 // PCIe MSI to SPI mapping range
48 #define ARM_JUNO_GIV2M_MSI_SPI_BASE           224
49 #define ARM_JUNO_GIV2M_MSI_SPI_COUNT          127 //TRM says last SPI is 351, 351-224=127
50 
51 // On-Chip non-secure SRAM
52 #define ARM_JUNO_NON_SECURE_SRAM_BASE         0x2E000000
53 #define ARM_JUNO_NON_SECURE_SRAM_SZ           SIZE_16MB
54 
55 // SOC peripherals (HDLCD, UART, I2C, I2S, USB, SMC-PL354, etc)
56 #define ARM_JUNO_SOC_PERIPHERALS_BASE         0x7FF50000
57 #define ARM_JUNO_SOC_PERIPHERALS_SZ           (SIZE_64KB * 9)
58 
59 // 6GB of DRAM from the 64bit address space
60 #define ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE     0x0880000000
61 #define ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ       (SIZE_2GB + SIZE_4GB)
62 
63 //
64 // ACPI table information used to initialize tables.
65 //
66 #define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
67 #define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('A','R','M','-','J','U','N','O') // OEM table id 8 bytes long
68 #define EFI_ACPI_ARM_OEM_REVISION     0x20140727
69 #define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
70 #define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
71 
72 // A macro to initialise the common header part of EFI ACPI tables as defined by
73 // EFI_ACPI_DESCRIPTION_HEADER structure.
74 #define ARM_ACPI_HEADER(Signature, Type, Revision) {              \
75     Signature,                      /* UINT32  Signature */       \
76     sizeof (Type),                  /* UINT32  Length */          \
77     Revision,                       /* UINT8   Revision */        \
78     0,                              /* UINT8   Checksum */        \
79     { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
80     EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
81     EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
82     EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
83     EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
84   }
85 
86 #define JUNO_WATCHDOG_COUNT  2
87 
88 // Define if the exported ACPI Tables are based on ACPI 5.0 spec or latest
89 //#define ARM_JUNO_ACPI_5_0
90 
91 //
92 // Address of the system registers that contain the MAC address
93 // assigned to the PCI Gigabyte Ethernet device.
94 //
95 
96 #define ARM_JUNO_SYS_PCIGBE_L  (ARM_VE_BOARD_PERIPH_BASE + 0x74)
97 #define ARM_JUNO_SYS_PCIGBE_H  (ARM_VE_BOARD_PERIPH_BASE + 0x78)
98 
99 #endif
100