1/// @file
2///  IPF specific application register reading functions
3///
4/// Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
5/// This program and the accompanying materials
6/// are licensed and made available under the terms and conditions of the BSD License
7/// which accompanies this distribution.  The full text of the license may be found at
8/// http://opensource.org/licenses/bsd-license.php.
9///
10/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12///
13///
14///
15
16
17
18//---------------------------------------------------------------------------------
19//++
20// AsmReadApplicationRegister
21//
22// Reads a 64-bit application register.
23//
24// Reads and returns the application register specified by Index.
25// If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only available on IPF.
26//
27// Arguments :
28//
29// On Entry : The index of the application register to read.
30//
31// Return Value: The application register specified by Index.
32//
33//--
34//----------------------------------------------------------------------------------
35.text
36.type   AsmReadApplicationRegister, @function
37.proc   AsmReadApplicationRegister
38.regstk 1, 0, 0, 0
39
40AsmReadApplicationRegister::
41  //
42  // ARs are defined in the ranges 0-44 and 64-66 (with some holes).
43  // Compact this list by subtracting 16 from the top range.
44  // 0-44, 64-66 -> 0-44, 48-50
45  //
46  mov  r15=2
47  mov  r14=pr                   // save predicates
48  cmp.leu  p6,p7=64,in0         // p6 = AR# >= 64
49  ;;
50  (p7)  cmp.leu  p7,p0=48,in0   // p7 = 32 <= AR# < 64
51  (p6)  add  in0=-16,in0        // if (AR >= 64) AR# -= 16
52  ;;
53  (p7)  mov  r15=0              // if bad range (48-63)
54  ;;
55  mov  ret0=-1                  // in case of illegal AR #
56  shl  r15=r15,in0              // r15 = 0x2 << AR#
57  ;;
58  mov  pr=r15,-1
59  ;;
60  //
61  // At this point the predicates contain a bit field of the
62  // AR desired.  (The bit is the AR+1, since pr0 is always 1.)
63  //
64  .pred.rel "mutex",p1,p2,p3,p4,p5,p6,p7,p8,p17,p18,p19,p20,p22,p25,\
65        p26,p27,p28,p29,p30,p31,p33,p37,p41,p45,p49,p50,p51
66  (p1)  mov  ret0=ar.k0         // ar0
67  (p2)  mov  ret0=ar.k1         // ar1
68  (p3)  mov  ret0=ar.k2         // ar2
69  (p4)  mov  ret0=ar.k3         // ar3
70  (p5)  mov  ret0=ar.k4         // ar4
71  (p6)  mov  ret0=ar.k5         // ar5
72  (p7)  mov  ret0=ar.k6         // ar6
73  (p8)  mov  ret0=ar.k7         // ar7
74
75  (p17)  mov  ret0=ar.rsc       // ar16
76  (p18)  mov  ret0=ar.bsp       // ar17
77  (p19)  mov  ret0=ar.bspstore  // ar18
78  (p20)  mov  ret0=ar.rnat      // ar19
79
80  (p22)  mov  ret0=ar.fcr       // ar21 [iA32]
81
82  (p25)  mov  ret0=ar.eflag     // ar24 [iA32]
83  (p26)  mov  ret0=ar.csd       // ar25 [iA32]
84  (p27)  mov  ret0=ar.ssd       // ar26 [iA32]
85  (p28)  mov  ret0=ar.cflg      // ar27 [iA32]
86  (p29)  mov  ret0=ar.fsr       // ar28 [iA32]
87  (p30)  mov  ret0=ar.fir       // ar29 [iA32]
88  (p31)  mov  ret0=ar.fdr       // ar30 [iA32]
89
90  (p33)  mov  ret0=ar.ccv       // ar32
91
92  (p37)  mov  ret0=ar.unat      // ar36
93
94  (p41)  mov  ret0=ar.fpsr      // ar40
95
96  (p45)  mov  ret0=ar.itc       // ar44
97
98  //
99  // This is the translated (-16) range.
100  //
101  (p49)  mov  ret0=ar.pfs       // ar64
102  (p50)  mov  ret0=ar.lc        // ar65
103  (p51)  mov  ret0=ar.ec        // ar66
104
105  // Restore predicates and return.
106
107  mov  pr=r14,-1
108  br.ret.sptk  b0
109  .endp
110