| /art/compiler/utils/ |
| D | assembler_thumb_test.cc | 475 __ Asr(R3, R4, 6); in TEST_F() local
486 __ Asr(R3, R4, 6, AL, kCcKeep); in TEST_F() local
1152 __ Asr(R0, R1, 5); in TEST_F() local
1156 __ Asr(R0, R0, R1); in TEST_F() local
1172 __ Asr(R0, R1, 5, AL, kCcKeep); in TEST_F() local
1176 __ Asr(R0, R0, R1, AL, kCcKeep); in TEST_F() local
1187 __ Asr(R8, R1, 5); in TEST_F() local
1193 __ Asr(R0, R1, R2); in TEST_F() local
1199 __ Asr(R0, R1, R8); in TEST_F() local
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| /art/compiler/optimizing/ |
| D | code_generator_arm_vixl.cc | 3693 __ Asr(HighRegisterFrom(out), LowRegisterFrom(out), 31); in VisitTypeConversion() local
4066 __ Asr(temp, dividend, 31); in DivRemByPowerOfTwo() local
4072 __ Asr(out, out, ctz_imm); in DivRemByPowerOfTwo() local
4111 __ Asr(temp1, temp1, shift); in GenerateDivRemWithAnyConstant() local
4636 __ Asr(out_reg, first_reg, out_reg); in HandleShift() local
4648 __ Asr(out_reg, first_reg, shift_value); in HandleShift() local
4704 __ Asr(o_h, high, o_h); in HandleShift() local
4733 __ Asr(o_l, high, shift_value - 32); in HandleShift() local
4734 __ Asr(o_h, high, 31); in HandleShift() local
4745 __ Asr(o_h, high, 31); in HandleShift() local
[all …]
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| D | code_generator_arm.cc | 3645 __ Asr(out.AsRegisterPairHigh<Register>(), in VisitTypeConversion() local
4073 __ Asr(temp, dividend, 31); in DivRemByPowerOfTwo() local
4079 __ Asr(out, out, ctz_imm); in DivRemByPowerOfTwo() local
4117 __ Asr(temp1, temp1, shift); in GenerateDivRemWithAnyConstant() local
4654 __ Asr(out_reg, first_reg, out_reg); in HandleShift() local
4666 __ Asr(out_reg, first_reg, shift_value); in HandleShift() local
4710 __ Asr(o_l, high, temp, PL); in HandleShift() local
4712 __ Asr(o_h, high, o_h); in HandleShift() local
4736 __ Asr(o_l, high, shift_value - 32); in HandleShift() local
4737 __ Asr(o_h, high, 31); in HandleShift() local
[all …]
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| D | code_generator_arm64.cc | 2496 __ Asr(dst, lhs, shift_value); in HandleShift() local
2506 __ Asr(dst, lhs, rhs_reg); in HandleShift() local
3323 __ Asr(out, out, ctz_imm); in DivRemByPowerOfTwo() local
3329 __ Asr(temp, dividend, bits - 1); in DivRemByPowerOfTwo() local
3374 __ Asr(temp, temp, shift); in GenerateDivRemWithAnyConstant() local
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| D | intrinsics_arm.cc | 432 __ Asr(mask, in_reg_hi, 31); in GenAbsInteger() local
441 __ Asr(mask, in_reg, 31); in GenAbsInteger() local
1265 __ Asr(temp3, temp3, 7u); // uncompressed ? 0xffff0000u : 0xff0000u. in VisitStringCompareTo() local
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| D | intrinsics_arm_vixl.cc | 490 __ Asr(mask, in_reg_hi, 31); in GenAbsInteger() local
499 __ Asr(mask, in_reg, 31); in GenAbsInteger() local
1633 __ Asr(temp3, temp3, 7u); // uncompressed ? 0xffff0000u : 0xff0000u. in VisitStringCompareTo() local
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| /art/compiler/utils/arm/ |
| D | assembler_thumb2.cc | 3431 void Thumb2Assembler::Asr(Register rd, Register rm, uint32_t shift_imm, in Asr() function in art::arm::Thumb2Assembler
3468 void Thumb2Assembler::Asr(Register rd, Register rm, Register rn, in Asr() function in art::arm::Thumb2Assembler
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