1 /* 2 * Copyright (c) 2011 Intel Corporation. All Rights Reserved. 3 * Copyright (c) Imagination Technologies Limited, UK 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 20 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 27 /****************************************************************************** 28 29 @File dxva_fw_ctrl.h 30 31 @Title va Firmware Control Allocation Commands 32 33 @Platform 34 35 @Description Defined commands that may be placed int the Control Allocation 36 37 ******************************************************************************/ 38 #ifndef _VA_FW_CTRL_H_ 39 #define _VA_FW_CTRL_H_ 40 41 42 #define CMD_MASK (0xF0000000) 43 44 /* No Operation */ 45 #define CMD_NOP (0x00000000) 46 47 /* Register Value Pair Block */ 48 #define CMD_REGVALPAIR_WRITE (0x10000000) 49 #define CMD_REGVALPAIR_COUNT_MASK (0x000FFFFF) 50 #define CMD_REGVALPAIR_COUNT_SHIFT (0) 51 52 #define CMD_REGVALPAIR_FLAG_MB_LAYER (0x00100000) 53 #define CMD_REGVALPAIR_FLAG_HL_LAYER (0x00200000) 54 #define CMD_REGVALPAIR_FLAG_PRELOAD (0x00400000) 55 #define CMD_REGVALPAIR_FLAG_VC1PATCH (0x00800000) 56 57 #define CMD_REGVALPAIR_FORCE_MASK (0x08000000) 58 59 /* Rendec Write Block */ 60 #define CMD_RENDEC_WRITE (0x20000000) 61 #define CMD_RENDEC_BLOCK (0x50000000) 62 #define CMD_RENDEC_COUNT_MASK (0x000FFFFF) 63 #define CMD_RENDEC_COUNT_SHIFT (0) 64 65 /* Rendec Block */ 66 #define CMD_RENDEC_BLOCK_FLAG_VC1_CMD_PATCH (0x01000000) 67 #define CMD_RENDEC_BLOCK_FLAG_VC1_BE_PATCH (0x02000000) 68 #define CMD_RENDEC_BLOCK_FLAG_VC1_SP_PATCH (0x04000000) 69 #define CMD_RENDEC_BLOCK_FLAG_VC1_IC_PATCH (0x08000000) 70 71 /* Command Allocation temination Commands */ 72 #define CMD_COMPLETION (0x60000000) 73 74 /* Use this to notify mxt of the context */ 75 #define CMD_HEADER (0x70000000) 76 #define CMD_HEADER_CONTEXT_MASK (0x0fffffff) 77 78 #define CMD_CONDITIONAL_SKIP (0x80000000) 79 80 #define CMD_HEADER_VC1 (0x90000000) 81 82 #define CMD_PARSE_HEADER (0xF0000000) 83 #define CMD_PARSE_HEADER_NEWSLICE (0x00000001) 84 85 /*****************************************************************/ 86 /* DMA */ 87 /*****************************************************************/ 88 #define CMD_DMA (0xE0000000) 89 #define CMD_DMA_DMA_TYPE_MASK (0x0ff00000) 90 #define CMD_DMA_DMA_TYPE_SHIFT ( 24 ) 91 #define CMD_DMA_DMA_SIZE_MASK (0x0000ffff) 92 #define CMD_DMA_OFFSET_FLAG (1<<19) 93 94 #define CMD_DMA_TYPE_VLC_TABLE ( 0 << CMD_DMA_DMA_TYPE_SHIFT ) 95 #define CMD_DMA_TYPE_RESIDUAL ( 1 << CMD_DMA_DMA_TYPE_SHIFT ) 96 #define CMD_DMA_TYPE_IDCT_INSERTION ( 2 << CMD_DMA_DMA_TYPE_SHIFT ) 97 #define CMD_DMA_TYPE_PROBABILITY_DATA ( 3 << CMD_DMA_DMA_TYPE_SHIFT ) 98 99 typedef struct _RENDER_BUFFER_HEADER_VC1_TAG { 100 IMG_UINT32 ui32Cmd; 101 IMG_UINT32 ui32RangeMappingBase[2]; /* Store flags in bottom bits of [0] */ 102 IMG_UINT32 ui32SliceParams; 103 union { 104 struct _LLDMA_VC1_ { 105 IMG_UINT32 ui32PreloadSave; 106 IMG_UINT32 ui32PreloadRestore; 107 } LLDMA_VC1; 108 } ui32LLDMAPointers; 109 110 } RENDER_BUFFER_HEADER_VC1; 111 112 typedef struct _RENDER_BUFFER_HEADER_TAG { 113 IMG_UINT32 ui32Cmd; 114 IMG_UINT32 ui32Reserved; /* used as ui32SliceParams in MPEG4 */ 115 union { 116 struct _LLDMA_MPEG4_ { 117 IMG_UINT32 ui32FEStatesSave; 118 IMG_UINT32 ui32FEStatesRestore; 119 } LLDMA_MPEG4; 120 121 struct _LLDMA_H264_ { 122 IMG_UINT32 ui32PreloadSave; 123 IMG_UINT32 ui32PreloadRestore; 124 125 } LLDMA_H264; 126 } ui32LLDMAPointers; 127 128 } RENDER_BUFFER_HEADER; 129 130 typedef struct _PARSE_HEADER_CMD_TAG { 131 IMG_UINT32 ui32Cmd; 132 IMG_UINT32 ui32SeqHdrData; 133 IMG_UINT32 ui32PicDimensions; 134 IMG_UINT32 ui32BitplaneAddr[3]; 135 IMG_UINT32 ui32VLCTableAddr; 136 IMG_UINT32 ui32ICParamData[2]; 137 } PARSE_HEADER_CMD; 138 139 /* Linked list DMA Command */ 140 #define CMD_LLDMA (0xA0000000) 141 #define CMD_SLLDMA (0xC0000000) /* Syncronose LLDMA */ 142 #define CMD_DMA (0xE0000000) 143 typedef struct { 144 IMG_UINT32 ui32CmdAndDevLinAddr; 145 } LLDMA_CMD; 146 147 typedef struct 148 { 149 IMG_UINT32 ui32Cmd; 150 IMG_UINT32 ui32DevVirtAdd; 151 } DMA_CMD; 152 153 typedef struct 154 { 155 IMG_UINT32 ui32Cmd; 156 IMG_UINT32 ui32DevVirtAdd; 157 IMG_UINT32 ui32ByteOffset; 158 } DMA_CMD_WITH_OFFSET; 159 160 typedef enum DMA_TYPE 161 { 162 DMA_TYPE_VLC_TABLE = CMD_DMA_TYPE_VLC_TABLE, 163 DMA_TYPE_RESIDUAL = CMD_DMA_TYPE_RESIDUAL, 164 DMA_TYPE_IDCT_INSERTION = CMD_DMA_TYPE_IDCT_INSERTION, 165 DMA_TYPE_PROBABILITY_DATA = CMD_DMA_TYPE_PROBABILITY_DATA, 166 } DMA_TYPE; 167 168 /* Shift Register Setup Command */ 169 #define CMD_SR_SETUP (0xB0000000) 170 #define CMD_ENABLE_RBDU_EXTRACTION (0x00000001) 171 #define CMD_SR_VERIFY_STARTCODE (0x00000004) 172 #ifdef SLICE_HEADER_PARSING 173 #define CMD_SR_BITSTR_PARSE_KEY (0x00000010) 174 #endif 175 #define CMD_BITSTREAM_DMA (0xA0000000) 176 typedef struct { 177 IMG_UINT32 ui32Cmd; 178 IMG_UINT32 ui32BitstreamOffsetBits; 179 IMG_UINT32 ui32BitstreamSizeBytes; 180 } SR_SETUP_CMD; 181 182 /* Next Segment Command */ 183 #define CMD_NEXT_SEG (0xD0000000) /* Also Syncronose */ 184 185 /*****************************************************************/ 186 /* Ctrl Alloc Header */ 187 /*****************************************************************/ 188 #define CMD_CTRL_ALLOC_HEADER (0x90000000) 189 typedef struct _CTRL_ALLOC_HEADER_TAG 190 { 191 IMG_UINT32 ui32Cmd_AdditionalParams; 192 IMG_UINT32 ui32SliceParams; 193 IMG_UINT32 ui32ExternStateBuffAddr; 194 IMG_UINT32 ui32MacroblockParamAddr; 195 IMG_UINT32 uiSliceFirstMbYX_uiPicLastMbYX; 196 IMG_UINT32 ui32AltOutputAddr[2]; /* VC1 only : Store Range Map flags in bottom bits of [0] */ 197 IMG_UINT32 ui32AltOutputFlags; 198 } CTRL_ALLOC_HEADER; 199 200 #define CMD_DEBLOCK (0x70000000) 201 #define CMD_DEBLOCK_TYPE_STD (0x00000000) 202 #define CMD_DEBLOCK_TYPE_OOLD (0x00000001) 203 #define CMD_DEBLOCK_TYPE_SKIP (0x00000002) 204 typedef struct _DEBLOCK_CMD_TAG 205 { 206 IMG_UINT32 ui32Cmd; /* 0x70000000 */ 207 IMG_UINT32 ui32SourceMbData; 208 IMG_UINT32 ui16PicWidthMbs; 209 IMG_UINT32 ui16FrameHeightMbs; 210 IMG_UINT32 ui32AddressA[2]; 211 } DEBLOCK_CMD; 212 213 #endif 214