1 /*
2  * Copyright (C) 2016 STMicroelectronics
3  *
4  * Author: Denis Ciocca <denis.ciocca@st.com>
5  *
6  * Licensed under the Apache License, Version 2.0 (the "License");
7  * you may not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  *    http://www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an "AS IS" BASIS,
14  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 
19 #ifndef __LSM6DSM_I2C_MASTER_LIS3MDL__
20 #define __LSM6DSM_I2C_MASTER_LIS3MDL__
21 
22 #ifdef LSM6DSM_I2C_MASTER_LIS3MDL
23 #ifndef LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED
24 #define LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED       1
25 #else /* LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED */
26 #error "Another magnetometer is already selected! One magn per time can be used."
27 #endif /* LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED */
28 #endif /* LSM6DSM_I2C_MASTER_LIS3MDL */
29 
30 #define LIS3MDL_KSCALE                                0.043840420868f    /* MAGN scale @12G in uT/LSB */
31 #define LIS3MDL_I2C_ADDRESS                           (0x1c)             /* SDO = 1 : 0x1e --- SDO = 0 : 0x1c */
32 
33 /* LIS3MDL registers */
34 #define LIS3MDL_WAI_ADDR                              (0x0f)
35 #define LIS3MDL_CTRL1_ADDR                            (0x20)
36 #define LIS3MDL_CTRL2_ADDR                            (0x21)
37 #define LIS3MDL_CTRL3_ADDR                            (0x22)
38 #define LIS3MDL_CTRL4_ADDR                            (0x23)
39 #define LIS3MDL_CTRL5_ADDR                            (0x24)
40 #define LIS3MDL_OUTDATA_ADDR                          (0x28)
41 
42 #define LIS3MDL_SW_RESET                              (0x04)
43 #define LIS3MDL_POWER_ON_VALUE                        (0x00)
44 #define LIS3MDL_POWER_OFF_VALUE                       (0x03)
45 #define LIS3MDL_OUTDATA_LEN                           (0x06)
46 
47 
48 /* LIS3MDL default base registers status */
49 /* LIS3MDL_CTRL1_BASE: control register 1 default settings */
50 #define LIS3MDL_CTRL1_BASE                           ((0 << 7) |    /* TEMP_EN */ \
51                                                       (1 << 6) |    /* OM1 */ \
52                                                       (1 << 5) |    /* OM0 */ \
53                                                       (0 << 4) |    /* DO2 */ \
54                                                       (0 << 3) |    /* DO1 */ \
55                                                       (0 << 2) |    /* DO0 */ \
56                                                       (0 << 1) |    /* FAST_ODR */ \
57                                                       (0 << 0))     /* ST */
58 
59 /* LIS3MDL_CTRL2_BASE: control register 2 default settings */
60 #define LIS3MDL_CTRL2_BASE                           ((0 << 7) |    /* (0) */ \
61                                                       (1 << 6) |    /* FS1 */ \
62                                                       (0 << 5) |    /* FS0 */ \
63                                                       (0 << 4) |    /* (0) */ \
64                                                       (0 << 3) |    /* REBOOT */ \
65                                                       (0 << 2) |    /* SOFT_RST */ \
66                                                       (0 << 1) |    /* (0) */ \
67                                                       (0 << 0))     /* (0) */
68 
69 /* LIS3MDL_CTRL3_BASE: control register 3 default settings */
70 #define LIS3MDL_CTRL3_BASE                            (0x00)
71 
72 /* LIS3MDL_CTRL4_BASE: control register 4 default settings */
73 #define LIS3MDL_CTRL4_BASE                           ((0 << 7) |    /* (0) */ \
74                                                       (0 << 6) |    /* (0) */ \
75                                                       (0 << 5) |    /* (0) */ \
76                                                       (0 << 4) |    /* (0) */ \
77                                                       (1 << 3) |    /* OMZ1 */ \
78                                                       (1 << 2) |    /* OMZ0 */ \
79                                                       (0 << 1) |    /* BLE */ \
80                                                       (0 << 0))     /* (0) */
81 
82 /* LIS3MDL_CTRL5_BASE: control register 5 default settings */
83 #define LIS3MDL_CTRL5_BASE                           ((0 << 7) |    /* FAST_READ */ \
84                                                       (1 << 6) |    /* BDU */ \
85                                                       (0 << 5) |    /* (0) */ \
86                                                       (0 << 4) |    /* (0) */ \
87                                                       (0 << 3) |    /* (0) */ \
88                                                       (0 << 2) |    /* (0) */ \
89                                                       (0 << 1) |    /* (0) */ \
90                                                       (0 << 0))     /* (0) */
91 
92 #ifdef LSM6DSM_I2C_MASTER_LIS3MDL
93 /* MUST BE SAME LENGTH OF LSM6DSMMagnRates */
94 static uint8_t LIS3MDLMagnRatesRegValue[] = {
95     0x0c, /* Expected 3.25Hz, ODR = 5Hz */
96     0x10, /* Expected 6.5Hz, ODR = 10Hz */
97     0x14, /* Expected 12.5Hz, ODR = 20Hz */
98     0x18, /* Expected 26Hz, ODR = 40Hz */
99     0x1c, /* Expected 52Hz, ODR = 80Hz */
100     0x1c, /* Expected 104Hz, ODR = 80Hz */
101 };
102 #endif /* LSM6DSM_I2C_MASTER_LIS3MDL */
103 
104 #endif /* __LSM6DSM_I2C_MASTER_LIS3MDL__ */
105