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Searched defs:Register (Results 1 – 25 of 114) sorted by relevance

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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/
DQNCAccess.h23 #define EFI_LPC_PCI_ADDRESS( Register ) \ argument
35 #define LpcPciCfg32( Register ) \ argument
38 #define LpcPciCfg32Or( Register, OrData ) \ argument
41 #define LpcPciCfg32And( Register, AndData ) \ argument
44 #define LpcPciCfg32AndThenOr( Register, AndData, OrData ) \ argument
47 #define LpcPciCfg16( Register ) \ argument
50 #define LpcPciCfg16Or( Register, OrData ) \ argument
53 #define LpcPciCfg16And( Register, AndData ) \ argument
56 #define LpcPciCfg16AndThenOr( Register, AndData, OrData ) \ argument
59 #define LpcPciCfg8( Register ) \ argument
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DQNCCommonDefinitions.h108 #define QNCMmioAddress( BaseAddr, Register ) \ argument
116 #define QNCMmio64Ptr( BaseAddr, Register ) \ argument
119 #define QNCMmio64( BaseAddr, Register ) \ argument
122 #define QNCMmio64Or( BaseAddr, Register, OrData ) \ argument
129 #define QNCMmio64And( BaseAddr, Register, AndData ) \ argument
136 #define QNCMmio64AndThenOr( BaseAddr, Register, AndData, OrData ) \ argument
148 #define QNCMmio32Ptr( BaseAddr, Register ) \ argument
151 #define QNCMmio32( BaseAddr, Register ) \ argument
154 #define QNCMmio32Or( BaseAddr, Register, OrData ) \ argument
161 #define QNCMmio32And( BaseAddr, Register, AndData ) \ argument
[all …]
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/
DPchAccess.h44 #define MmPciAddress(Segment, Bus, Device, Function, Register) \ argument
66 #define PchAzaliaPciCfg32(Register) \ argument
75 #define PchAzaliaPciCfg32Or(Register, OrData) \ argument
85 #define PchAzaliaPciCfg32And(Register, AndData) \ argument
95 #define PchAzaliaPciCfg32AndThenOr(Register, AndData, OrData) \ argument
105 #define PchAzaliaPciCfg16(Register) \ argument
114 #define PchAzaliaPciCfg16Or(Register, OrData) \ argument
124 #define PchAzaliaPciCfg16And(Register, AndData) \ argument
134 #define PchAzaliaPciCfg16AndThenOr(Register, AndData, OrData) \ argument
145 #define PchAzaliaPciCfg8(Register) MmioRead8 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEV… argument
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DPchCommonDefinitions.h30 #define PchMmioAddress(BaseAddr, Register) ((UINTN) BaseAddr + (UINTN) (Register)) argument
35 #define PchMmio32Ptr(BaseAddr, Register) ((volatile UINT32 *) PchMmioAddress (BaseAddr, Register)) argument
37 #define PchMmio32(BaseAddr, Register) *PchMmio32Ptr (BaseAddr, Register) argument
39 #define PchMmio32Or(BaseAddr, Register, OrData) \ argument
43 #define PchMmio32And(BaseAddr, Register, AndData) \ argument
47 #define PchMmio32AndThenOr(BaseAddr, Register, AndData, OrData) \ argument
54 #define PchMmio16Ptr(BaseAddr, Register) ((volatile UINT16 *) PchMmioAddress (BaseAddr, Register)) argument
56 #define PchMmio16(BaseAddr, Register) *PchMmio16Ptr (BaseAddr, Register) argument
58 #define PchMmio16Or(BaseAddr, Register, OrData) \ argument
62 #define PchMmio16And(BaseAddr, Register, AndData) \ argument
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/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/
DVlvAccess.h36 #define MmioAddress( BaseAddr, Register ) \ argument
46 #define Mmio32Ptr( BaseAddr, Register ) \ argument
49 #define Mmio32( BaseAddr, Register ) \ argument
52 #define Mmio32Or( BaseAddr, Register, OrData ) \ argument
59 #define Mmio32And( BaseAddr, Register, AndData ) \ argument
66 #define Mmio32AndThenOr( BaseAddr, Register, AndData, OrData ) \ argument
79 #define Mmio16Ptr( BaseAddr, Register ) \ argument
82 #define Mmio16( BaseAddr, Register ) \ argument
85 #define Mmio16Or( BaseAddr, Register, OrData ) \ argument
92 #define Mmio16And( BaseAddr, Register, AndData ) \ argument
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DVlvCommonDefinitions.h118 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \ argument
130 #define MmPci64Ptr( Segment, Bus, Device, Function, Register ) \ argument
133 #define MmPci64( Segment, Bus, Device, Function, Register ) \ argument
136 #define MmPci64Or( Segment, Bus, Device, Function, Register, OrData ) \ argument
143 #define MmPci64And( Segment, Bus, Device, Function, Register, AndData ) \ argument
150 #define MmPci64AndThenOr( Segment, Bus, Device, Function, Register, AndData, OrData ) \ argument
163 #define MmPci32Ptr( Segment, Bus, Device, Function, Register ) \ argument
166 #define MmPci32( Segment, Bus, Device, Function, Register ) \ argument
169 #define MmPci32Or( Segment, Bus, Device, Function, Register, OrData ) \ argument
176 #define MmPci32And( Segment, Bus, Device, Function, Register, AndData ) \ argument
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/
DIohCommonDefinitions.h108 #define IohMmioAddress( BaseAddr, Register ) \ argument
116 #define IohMmio64Ptr( BaseAddr, Register ) \ argument
119 #define IohMmio64( BaseAddr, Register ) \ argument
122 #define IohMmio64Or( BaseAddr, Register, OrData ) \ argument
129 #define IohMmio64And( BaseAddr, Register, AndData ) \ argument
136 #define IohMmio64AndThenOr( BaseAddr, Register, AndData, OrData ) \ argument
148 #define IohMmio32Ptr( BaseAddr, Register ) \ argument
151 #define IohMmio32( BaseAddr, Register ) \ argument
154 #define IohMmio32Or( BaseAddr, Register, OrData ) \ argument
161 #define IohMmio32And( BaseAddr, Register, AndData ) \ argument
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/X64/
DPlatformIoLib.c33 UINT8 Register in GetPciAddress()
69 UINT8 Register in PciRead8()
115 UINT8 Register in PciRead16()
161 UINT8 Register in PciRead32()
207 UINT8 Register, in PciWrite8()
252 UINT8 Register, in PciWrite16()
297 UINT8 Register, in PciWrite32()
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/Ia32/
DPlatformIoLib.c33 UINT8 Register in GetPciAddress()
67 UINT8 Register in PciRead8()
113 UINT8 Register in PciRead16()
159 UINT8 Register in PciRead32()
205 UINT8 Register, in PciWrite8()
250 UINT8 Register, in PciWrite16()
295 UINT8 Register, in PciWrite32()
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibPei/
DI2CAccess.h37 #define PchLpcPciCfg8(Register) I2CLibPeiMmioRead8 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PC… argument
42 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \ argument
/device/linaro/bootloader/edk2/EmbeddedPkg/Library/GdbDebugAgent/Ia32/
DProcessor.c530 OUT UINTN *Register in FindNextFreeDebugRegister()
569 IN UINTN Register, in EnableDebugRegister()
649 OUT UINTN *Register in FindMatchingDebugRegister()
707 IN UINTN Register in DisableDebugRegister()
769 UINTN Register; in InsertBreakPoint() local
853 UINTN Register; in RemoveBreakPoint() local
/device/linaro/bootloader/edk2/Omap35xxPkg/TPS65950Dxe/
DTPS65950.c32 IN UINTN Register, in Read()
59 IN UINTN Register, in Write()
/device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/TPS65950Dxe/
DTPS65950.c32 IN UINTN Register, in Read()
59 IN UINTN Register, in Write()
/device/linaro/bootloader/edk2/EmbeddedPkg/GdbStub/Ia32/
DProcessor.c578 OUT UINTN *Register in FindNextFreeDebugRegister()
617 IN UINTN Register, in EnableDebugRegister()
697 OUT UINTN *Register in FindMatchingDebugRegister()
755 IN UINTN Register in DisableDebugRegister()
817 UINTN Register; in InsertBreakPoint() local
904 UINTN Register; in RemoveBreakPoint() local
/device/linaro/bootloader/edk2/EmbeddedPkg/GdbStub/X64/
DProcessor.c549 OUT UINTN *Register in FindNextFreeDebugRegister()
588 IN UINTN Register, in EnableDebugRegister()
668 OUT UINTN *Register in FindMatchingDebugRegister()
726 IN UINTN Register in DisableDebugRegister()
787 UINTN Register; in InsertBreakPoint() local
874 UINTN Register; in RemoveBreakPoint() local
/device/linaro/bootloader/edk2/EmbeddedPkg/Library/GdbDebugAgent/X64/
DProcessor.c549 OUT UINTN *Register in FindNextFreeDebugRegister()
588 IN UINTN Register, in EnableDebugRegister()
668 OUT UINTN *Register in FindMatchingDebugRegister()
726 IN UINTN Register in DisableDebugRegister()
787 UINTN Register; in InsertBreakPoint() local
874 UINTN Register; in RemoveBreakPoint() local
/device/linaro/bootloader/edk2/MdePkg/Include/Library/
DPciLib.h40 #define PCI_LIB_ADDRESS(Bus,Device,Function,Register) \ argument
DS3PciLib.h35 #define S3_PCI_LIB_ADDRESS(Bus,Device,Function,Register) \ argument
DPciSegmentLib.h58 #define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \ argument
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/
DEfiCpuVersion.c46 EfiCpuVersion ( in EfiCpuVersion()
47 IN OUT UINT16 *FamilyId, OPTIONAL in EfiCpuVersion()
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/
DEfiCpuVersion.c44 EFI_CPUID_REGISTER Register; in EfiCpuVersion() local
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Wpce791/
DLpcIsaAcpi.h36 #define _LPC_ISA_ACPI_H
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/
DExI.c30 ExI configuration based on setup option
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNC/
DQNCSmmHelpers.c230 UINT64 Register; in ReadBitDesc() local
407 UINT64 Register; in WriteBitDesc() local
/device/linaro/bootloader/edk2/MdePkg/Include/Ppi/
DReportStatusCodeHandler.h76 EFI_PEI_RSC_HANDLER_REGISTER Register; member

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