1 /** @file 2 SMM profile internal header file. 3 4 Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR> 5 This program and the accompanying materials 6 are licensed and made available under the terms and conditions of the BSD License 7 which accompanies this distribution. The full text of the license may be found at 8 http://opensource.org/licenses/bsd-license.php 9 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 13 **/ 14 15 #ifndef _SMM_PROFILE_INTERNAL_H_ 16 #define _SMM_PROFILE_INTERNAL_H_ 17 18 #include <Guid/GlobalVariable.h> 19 #include <Guid/Acpi.h> 20 #include <Protocol/SmmReadyToLock.h> 21 #include <Library/UefiRuntimeServicesTableLib.h> 22 #include <Library/DxeServicesTableLib.h> 23 #include <Library/CpuLib.h> 24 #include <IndustryStandard/Acpi.h> 25 26 #include "SmmProfileArch.h" 27 28 // 29 // Configure the SMM_PROFILE DTS region size 30 // 31 #define SMM_PROFILE_DTS_SIZE (4 * 1024 * 1024) // 4M 32 33 #define MAX_PF_PAGE_COUNT 0x2 34 35 #define PEBS_RECORD_NUMBER 0x2 36 37 #define MAX_PF_ENTRY_COUNT 10 38 39 // 40 // This MACRO just enable unit test for the profile 41 // Please disable it. 42 // 43 44 #define IA32_PF_EC_P (1u << 0) 45 #define IA32_PF_EC_WR (1u << 1) 46 #define IA32_PF_EC_US (1u << 2) 47 #define IA32_PF_EC_RSVD (1u << 3) 48 #define IA32_PF_EC_ID (1u << 4) 49 50 #define SMM_PROFILE_NAME L"SmmProfileData" 51 52 // 53 // CPU generic definition 54 // 55 #define CPUID1_EDX_XD_SUPPORT 0x100000 56 #define MSR_EFER 0xc0000080 57 #define MSR_EFER_XD 0x800 58 59 #define CPUID1_EDX_BTS_AVAILABLE 0x200000 60 61 #define DR6_SINGLE_STEP 0x4000 62 #define RFLAG_TF 0x100 63 64 #define MSR_DEBUG_CTL 0x1D9 65 #define MSR_DEBUG_CTL_LBR 0x1 66 #define MSR_DEBUG_CTL_TR 0x40 67 #define MSR_DEBUG_CTL_BTS 0x80 68 #define MSR_DEBUG_CTL_BTINT 0x100 69 #define MSR_LASTBRANCH_TOS 0x1C9 70 #define MSR_LER_FROM_LIP 0x1DD 71 #define MSR_LER_TO_LIP 0x1DE 72 #define MSR_DS_AREA 0x600 73 74 typedef struct { 75 EFI_PHYSICAL_ADDRESS Base; 76 EFI_PHYSICAL_ADDRESS Top; 77 } MEMORY_RANGE; 78 79 typedef struct { 80 MEMORY_RANGE Range; 81 BOOLEAN Present; 82 BOOLEAN Nx; 83 } MEMORY_PROTECTION_RANGE; 84 85 typedef struct { 86 UINT64 HeaderSize; 87 UINT64 MaxDataEntries; 88 UINT64 MaxDataSize; 89 UINT64 CurDataEntries; 90 UINT64 CurDataSize; 91 UINT64 TsegStart; 92 UINT64 TsegSize; 93 UINT64 NumSmis; 94 UINT64 NumCpus; 95 } SMM_PROFILE_HEADER; 96 97 typedef struct { 98 UINT64 SmiNum; 99 UINT64 CpuNum; 100 UINT64 ApicId; 101 UINT64 ErrorCode; 102 UINT64 Instruction; 103 UINT64 Address; 104 UINT64 SmiCmd; 105 } SMM_PROFILE_ENTRY; 106 107 extern SMM_S3_RESUME_STATE *mSmmS3ResumeState; 108 extern UINTN gSmiExceptionHandlers[]; 109 extern BOOLEAN mXdSupported; 110 extern UINTN *mPFEntryCount; 111 extern UINT64 (*mLastPFEntryValue)[MAX_PF_ENTRY_COUNT]; 112 extern UINT64 *(*mLastPFEntryPointer)[MAX_PF_ENTRY_COUNT]; 113 114 // 115 // Internal functions 116 // 117 118 /** 119 Update IDT table to replace page fault handler and INT 1 handler. 120 121 **/ 122 VOID 123 InitIdtr ( 124 VOID 125 ); 126 127 /** 128 Check if the memory address will be mapped by 4KB-page. 129 130 @param Address The address of Memory. 131 132 **/ 133 BOOLEAN 134 IsAddressSplit ( 135 IN EFI_PHYSICAL_ADDRESS Address 136 ); 137 138 /** 139 Check if the memory address will be mapped by 4KB-page. 140 141 @param Address The address of Memory. 142 @param Nx The flag indicates if the memory is execute-disable. 143 144 **/ 145 BOOLEAN 146 IsAddressValid ( 147 IN EFI_PHYSICAL_ADDRESS Address, 148 IN BOOLEAN *Nx 149 ); 150 151 /** 152 Page Fault handler for SMM use. 153 154 **/ 155 VOID 156 SmiDefaultPFHandler ( 157 VOID 158 ); 159 160 /** 161 Clear TF in FLAGS. 162 163 @param SystemContext A pointer to the processor context when 164 the interrupt occurred on the processor. 165 166 **/ 167 VOID 168 ClearTrapFlag ( 169 IN OUT EFI_SYSTEM_CONTEXT SystemContext 170 ); 171 172 #endif // _SMM_PROFILE_H_ 173