/art/compiler/optimizing/ |
D | code_generator_mips.cc | 2234 __ Sra(dst, lhs, shift_value); in HandleShift() local 2289 __ Sra(dst_high, lhs_high, shift_value); in HandleShift() local 2307 __ Sra(dst_high, lhs_high, shift_value); in HandleShift() local 2331 __ Sra(dst_low, lhs_high, shift_value_high); in HandleShift() local 2332 __ Sra(dst_high, dst_low, kMipsBitsPerWord - 1); in HandleShift() local 2381 __ Sra(dst_high, dst_high, 31); in HandleShift() local 3522 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo() local 3526 __ Sra(out, out, ctz_imm); in DivRemByPowerOfTwo() local 3533 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo() local 3538 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo() local [all …]
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D | code_generator_mips64.cc | 1909 __ Sra(dst, lhs, shift_value); in HandleShift() local 3019 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo() local 3023 __ Sra(out, out, ctz_imm); in DivRemByPowerOfTwo() local 3054 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo() local 3059 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo() local 3135 __ Sra(TMP, TMP, shift); in GenerateDivRemWithAnyConstant() local 3139 __ Sra(out, TMP, 31); in GenerateDivRemWithAnyConstant() local 3142 __ Sra(AT, TMP, 31); in GenerateDivRemWithAnyConstant() local
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D | intrinsics_mips.cc | 266 __ Sra(TMP, TMP, 16); in GenReverse() local 827 __ Sra(AT, in_hi, 31); in GenAbsInteger() local 839 __ Sra(AT, in, 31); in GenAbsInteger() local
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D | intrinsics_mips64.cc | 520 __ Sra(AT, in, 31); in GenAbsInteger() local
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/art/compiler/utils/mips/ |
D | assembler_mips_test.cc | 366 TEST_F(AssemblerMIPSTest, Sra) { in TEST_F() argument
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D | assembler_mips.cc | 603 void MipsAssembler::Sra(Register rd, Register rt, int shamt) { in Sra() function in art::mips::MipsAssembler
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/art/compiler/utils/mips64/ |
D | assembler_mips64_test.cc | 1487 TEST_F(AssemblerMIPS64Test, Sra) { in TEST_F() argument
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D | assembler_mips64.cc | 488 void Mips64Assembler::Sra(GpuRegister rd, GpuRegister rt, int shamt) { in Sra() function in art::mips64::Mips64Assembler
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