1 /*
2  * Copyright (C) 2014 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include "globals.h"
18 #include "assembler_arm64.h"
19 #include "managed_register_arm64.h"
20 #include "gtest/gtest.h"
21 
22 namespace art {
23 namespace arm64 {
24 
TEST(Arm64ManagedRegister,NoRegister)25 TEST(Arm64ManagedRegister, NoRegister) {
26   Arm64ManagedRegister reg = ManagedRegister::NoRegister().AsArm64();
27   EXPECT_TRUE(reg.IsNoRegister());
28   EXPECT_TRUE(!reg.Overlaps(reg));
29 }
30 
31 // X Register test.
TEST(Arm64ManagedRegister,XRegister)32 TEST(Arm64ManagedRegister, XRegister) {
33   Arm64ManagedRegister reg = Arm64ManagedRegister::FromXRegister(X0);
34   Arm64ManagedRegister wreg = Arm64ManagedRegister::FromWRegister(W0);
35   EXPECT_TRUE(!reg.IsNoRegister());
36   EXPECT_TRUE(reg.IsXRegister());
37   EXPECT_TRUE(!reg.IsWRegister());
38   EXPECT_TRUE(!reg.IsDRegister());
39   EXPECT_TRUE(!reg.IsSRegister());
40   EXPECT_TRUE(reg.Overlaps(wreg));
41   EXPECT_EQ(X0, reg.AsXRegister());
42 
43   reg = Arm64ManagedRegister::FromXRegister(X1);
44   wreg = Arm64ManagedRegister::FromWRegister(W1);
45   EXPECT_TRUE(!reg.IsNoRegister());
46   EXPECT_TRUE(reg.IsXRegister());
47   EXPECT_TRUE(!reg.IsWRegister());
48   EXPECT_TRUE(!reg.IsDRegister());
49   EXPECT_TRUE(!reg.IsSRegister());
50   EXPECT_TRUE(reg.Overlaps(wreg));
51   EXPECT_EQ(X1, reg.AsXRegister());
52 
53   reg = Arm64ManagedRegister::FromXRegister(X7);
54   wreg = Arm64ManagedRegister::FromWRegister(W7);
55   EXPECT_TRUE(!reg.IsNoRegister());
56   EXPECT_TRUE(reg.IsXRegister());
57   EXPECT_TRUE(!reg.IsWRegister());
58   EXPECT_TRUE(!reg.IsDRegister());
59   EXPECT_TRUE(!reg.IsSRegister());
60   EXPECT_TRUE(reg.Overlaps(wreg));
61   EXPECT_EQ(X7, reg.AsXRegister());
62 
63   reg = Arm64ManagedRegister::FromXRegister(X15);
64   wreg = Arm64ManagedRegister::FromWRegister(W15);
65   EXPECT_TRUE(!reg.IsNoRegister());
66   EXPECT_TRUE(reg.IsXRegister());
67   EXPECT_TRUE(!reg.IsWRegister());
68   EXPECT_TRUE(!reg.IsDRegister());
69   EXPECT_TRUE(!reg.IsSRegister());
70   EXPECT_TRUE(reg.Overlaps(wreg));
71   EXPECT_EQ(X15, reg.AsXRegister());
72 
73   reg = Arm64ManagedRegister::FromXRegister(X19);
74   wreg = Arm64ManagedRegister::FromWRegister(W19);
75   EXPECT_TRUE(!reg.IsNoRegister());
76   EXPECT_TRUE(reg.IsXRegister());
77   EXPECT_TRUE(!reg.IsWRegister());
78   EXPECT_TRUE(!reg.IsDRegister());
79   EXPECT_TRUE(!reg.IsSRegister());
80   EXPECT_TRUE(reg.Overlaps(wreg));
81   EXPECT_EQ(X19, reg.AsXRegister());
82 
83   reg = Arm64ManagedRegister::FromXRegister(X16);
84   wreg = Arm64ManagedRegister::FromWRegister(W16);
85   EXPECT_TRUE(!reg.IsNoRegister());
86   EXPECT_TRUE(reg.IsXRegister());
87   EXPECT_TRUE(!reg.IsWRegister());
88   EXPECT_TRUE(!reg.IsDRegister());
89   EXPECT_TRUE(!reg.IsSRegister());
90   EXPECT_TRUE(reg.Overlaps(wreg));
91   EXPECT_EQ(IP0, reg.AsXRegister());
92 
93   reg = Arm64ManagedRegister::FromXRegister(SP);
94   wreg = Arm64ManagedRegister::FromWRegister(WZR);
95   EXPECT_TRUE(!reg.IsNoRegister());
96   EXPECT_TRUE(reg.IsXRegister());
97   EXPECT_TRUE(!reg.IsWRegister());
98   EXPECT_TRUE(!reg.IsDRegister());
99   EXPECT_TRUE(!reg.IsSRegister());
100   EXPECT_TRUE(!reg.Overlaps(wreg));
101   EXPECT_EQ(SP, reg.AsXRegister());
102 }
103 
104 // W register test.
TEST(Arm64ManagedRegister,WRegister)105 TEST(Arm64ManagedRegister, WRegister) {
106   Arm64ManagedRegister reg = Arm64ManagedRegister::FromWRegister(W0);
107   Arm64ManagedRegister xreg = Arm64ManagedRegister::FromXRegister(X0);
108   EXPECT_TRUE(!reg.IsNoRegister());
109   EXPECT_TRUE(!reg.IsXRegister());
110   EXPECT_TRUE(reg.IsWRegister());
111   EXPECT_TRUE(!reg.IsDRegister());
112   EXPECT_TRUE(!reg.IsSRegister());
113   EXPECT_TRUE(reg.Overlaps(xreg));
114   EXPECT_EQ(W0, reg.AsWRegister());
115 
116   reg = Arm64ManagedRegister::FromWRegister(W5);
117   xreg = Arm64ManagedRegister::FromXRegister(X5);
118   EXPECT_TRUE(!reg.IsNoRegister());
119   EXPECT_TRUE(!reg.IsXRegister());
120   EXPECT_TRUE(reg.IsWRegister());
121   EXPECT_TRUE(!reg.IsDRegister());
122   EXPECT_TRUE(!reg.IsSRegister());
123   EXPECT_TRUE(reg.Overlaps(xreg));
124   EXPECT_EQ(W5, reg.AsWRegister());
125 
126   reg = Arm64ManagedRegister::FromWRegister(W6);
127   xreg = Arm64ManagedRegister::FromXRegister(X6);
128   EXPECT_TRUE(!reg.IsNoRegister());
129   EXPECT_TRUE(!reg.IsXRegister());
130   EXPECT_TRUE(reg.IsWRegister());
131   EXPECT_TRUE(!reg.IsDRegister());
132   EXPECT_TRUE(!reg.IsSRegister());
133   EXPECT_TRUE(reg.Overlaps(xreg));
134   EXPECT_EQ(W6, reg.AsWRegister());
135 
136   reg = Arm64ManagedRegister::FromWRegister(W18);
137   xreg = Arm64ManagedRegister::FromXRegister(X18);
138   EXPECT_TRUE(!reg.IsNoRegister());
139   EXPECT_TRUE(!reg.IsXRegister());
140   EXPECT_TRUE(reg.IsWRegister());
141   EXPECT_TRUE(!reg.IsDRegister());
142   EXPECT_TRUE(!reg.IsSRegister());
143   EXPECT_TRUE(reg.Overlaps(xreg));
144   EXPECT_EQ(W18, reg.AsWRegister());
145 
146   reg = Arm64ManagedRegister::FromWRegister(W29);
147   xreg = Arm64ManagedRegister::FromXRegister(FP);
148   EXPECT_TRUE(!reg.IsNoRegister());
149   EXPECT_TRUE(!reg.IsXRegister());
150   EXPECT_TRUE(reg.IsWRegister());
151   EXPECT_TRUE(!reg.IsDRegister());
152   EXPECT_TRUE(!reg.IsSRegister());
153   EXPECT_TRUE(reg.Overlaps(xreg));
154   EXPECT_EQ(W29, reg.AsWRegister());
155 
156   reg = Arm64ManagedRegister::FromWRegister(WZR);
157   xreg = Arm64ManagedRegister::FromXRegister(SP);
158   EXPECT_TRUE(!reg.IsNoRegister());
159   EXPECT_TRUE(!reg.IsXRegister());
160   EXPECT_TRUE(reg.IsWRegister());
161   EXPECT_TRUE(!reg.IsDRegister());
162   EXPECT_TRUE(!reg.IsSRegister());
163   EXPECT_TRUE(!reg.Overlaps(xreg));
164 }
165 
166 // D Register test.
TEST(Arm64ManagedRegister,DRegister)167 TEST(Arm64ManagedRegister, DRegister) {
168   Arm64ManagedRegister reg = Arm64ManagedRegister::FromDRegister(D0);
169   Arm64ManagedRegister sreg = Arm64ManagedRegister::FromSRegister(S0);
170   EXPECT_TRUE(!reg.IsNoRegister());
171   EXPECT_TRUE(!reg.IsXRegister());
172   EXPECT_TRUE(!reg.IsWRegister());
173   EXPECT_TRUE(reg.IsDRegister());
174   EXPECT_TRUE(!reg.IsSRegister());
175   EXPECT_TRUE(reg.Overlaps(sreg));
176   EXPECT_EQ(D0, reg.AsDRegister());
177   EXPECT_EQ(S0, reg.AsOverlappingSRegister());
178   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D0)));
179 
180   reg = Arm64ManagedRegister::FromDRegister(D1);
181   sreg = Arm64ManagedRegister::FromSRegister(S1);
182   EXPECT_TRUE(!reg.IsNoRegister());
183   EXPECT_TRUE(!reg.IsXRegister());
184   EXPECT_TRUE(!reg.IsWRegister());
185   EXPECT_TRUE(reg.IsDRegister());
186   EXPECT_TRUE(!reg.IsSRegister());
187   EXPECT_TRUE(reg.Overlaps(sreg));
188   EXPECT_EQ(D1, reg.AsDRegister());
189   EXPECT_EQ(S1, reg.AsOverlappingSRegister());
190   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D1)));
191 
192   reg = Arm64ManagedRegister::FromDRegister(D20);
193   sreg = Arm64ManagedRegister::FromSRegister(S20);
194   EXPECT_TRUE(!reg.IsNoRegister());
195   EXPECT_TRUE(!reg.IsXRegister());
196   EXPECT_TRUE(!reg.IsWRegister());
197   EXPECT_TRUE(reg.IsDRegister());
198   EXPECT_TRUE(!reg.IsSRegister());
199   EXPECT_TRUE(reg.Overlaps(sreg));
200   EXPECT_EQ(D20, reg.AsDRegister());
201   EXPECT_EQ(S20, reg.AsOverlappingSRegister());
202   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D20)));
203 
204   reg = Arm64ManagedRegister::FromDRegister(D31);
205   sreg = Arm64ManagedRegister::FromSRegister(S31);
206   EXPECT_TRUE(!reg.IsNoRegister());
207   EXPECT_TRUE(!reg.IsXRegister());
208   EXPECT_TRUE(!reg.IsWRegister());
209   EXPECT_TRUE(reg.IsDRegister());
210   EXPECT_TRUE(!reg.IsSRegister());
211   EXPECT_TRUE(reg.Overlaps(sreg));
212   EXPECT_EQ(D31, reg.AsDRegister());
213   EXPECT_EQ(S31, reg.AsOverlappingSRegister());
214   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D31)));
215 }
216 
217 // S Register test.
TEST(Arm64ManagedRegister,SRegister)218 TEST(Arm64ManagedRegister, SRegister) {
219   Arm64ManagedRegister reg = Arm64ManagedRegister::FromSRegister(S0);
220   Arm64ManagedRegister dreg = Arm64ManagedRegister::FromDRegister(D0);
221   EXPECT_TRUE(!reg.IsNoRegister());
222   EXPECT_TRUE(!reg.IsXRegister());
223   EXPECT_TRUE(!reg.IsWRegister());
224   EXPECT_TRUE(reg.IsSRegister());
225   EXPECT_TRUE(!reg.IsDRegister());
226   EXPECT_TRUE(reg.Overlaps(dreg));
227   EXPECT_EQ(S0, reg.AsSRegister());
228   EXPECT_EQ(D0, reg.AsOverlappingDRegister());
229   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S0)));
230 
231   reg = Arm64ManagedRegister::FromSRegister(S5);
232   dreg = Arm64ManagedRegister::FromDRegister(D5);
233   EXPECT_TRUE(!reg.IsNoRegister());
234   EXPECT_TRUE(!reg.IsXRegister());
235   EXPECT_TRUE(!reg.IsWRegister());
236   EXPECT_TRUE(reg.IsSRegister());
237   EXPECT_TRUE(!reg.IsDRegister());
238   EXPECT_TRUE(reg.Overlaps(dreg));
239   EXPECT_EQ(S5, reg.AsSRegister());
240   EXPECT_EQ(D5, reg.AsOverlappingDRegister());
241   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S5)));
242 
243   reg = Arm64ManagedRegister::FromSRegister(S7);
244   dreg = Arm64ManagedRegister::FromDRegister(D7);
245   EXPECT_TRUE(!reg.IsNoRegister());
246   EXPECT_TRUE(!reg.IsXRegister());
247   EXPECT_TRUE(!reg.IsWRegister());
248   EXPECT_TRUE(reg.IsSRegister());
249   EXPECT_TRUE(!reg.IsDRegister());
250   EXPECT_TRUE(reg.Overlaps(dreg));
251   EXPECT_EQ(S7, reg.AsSRegister());
252   EXPECT_EQ(D7, reg.AsOverlappingDRegister());
253   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S7)));
254 
255   reg = Arm64ManagedRegister::FromSRegister(S31);
256   dreg = Arm64ManagedRegister::FromDRegister(D31);
257   EXPECT_TRUE(!reg.IsNoRegister());
258   EXPECT_TRUE(!reg.IsXRegister());
259   EXPECT_TRUE(!reg.IsWRegister());
260   EXPECT_TRUE(reg.IsSRegister());
261   EXPECT_TRUE(!reg.IsDRegister());
262   EXPECT_TRUE(reg.Overlaps(dreg));
263   EXPECT_EQ(S31, reg.AsSRegister());
264   EXPECT_EQ(D31, reg.AsOverlappingDRegister());
265   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S31)));
266 }
267 
TEST(Arm64ManagedRegister,Equals)268 TEST(Arm64ManagedRegister, Equals) {
269   ManagedRegister no_reg = ManagedRegister::NoRegister();
270   EXPECT_TRUE(no_reg.Equals(Arm64ManagedRegister::NoRegister()));
271   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromXRegister(X0)));
272   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromXRegister(X1)));
273   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W0)));
274   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W1)));
275   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromDRegister(D0)));
276   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromSRegister(S0)));
277 
278   Arm64ManagedRegister reg_X0 = Arm64ManagedRegister::FromXRegister(X0);
279   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::NoRegister()));
280   EXPECT_TRUE(reg_X0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
281   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromXRegister(X1)));
282   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromWRegister(W0)));
283   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
284   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
285 
286   Arm64ManagedRegister reg_X1 = Arm64ManagedRegister::FromXRegister(X1);
287   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::NoRegister()));
288   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromXRegister(X0)));
289   EXPECT_TRUE(reg_X1.Equals(Arm64ManagedRegister::FromXRegister(X1)));
290   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromWRegister(W1)));
291   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D0)));
292   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S0)));
293   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D1)));
294   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S1)));
295 
296   Arm64ManagedRegister reg_SP = Arm64ManagedRegister::FromXRegister(SP);
297   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::NoRegister()));
298   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromXRegister(XZR)));
299   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromSRegister(S0)));
300   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromDRegister(D0)));
301 
302   Arm64ManagedRegister reg_W8 = Arm64ManagedRegister::FromWRegister(W8);
303   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::NoRegister()));
304   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromXRegister(X0)));
305   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromXRegister(X8)));
306   EXPECT_TRUE(reg_W8.Equals(Arm64ManagedRegister::FromWRegister(W8)));
307   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D0)));
308   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S0)));
309   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D1)));
310   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S1)));
311 
312   Arm64ManagedRegister reg_W12 = Arm64ManagedRegister::FromWRegister(W12);
313   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::NoRegister()));
314   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromXRegister(X0)));
315   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromXRegister(X8)));
316   EXPECT_TRUE(reg_W12.Equals(Arm64ManagedRegister::FromWRegister(W12)));
317   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D0)));
318   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S0)));
319   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D1)));
320   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S1)));
321 
322   Arm64ManagedRegister reg_S0 = Arm64ManagedRegister::FromSRegister(S0);
323   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::NoRegister()));
324   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
325   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromXRegister(X1)));
326   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromWRegister(W0)));
327   EXPECT_TRUE(reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
328   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S1)));
329   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
330   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D1)));
331 
332   Arm64ManagedRegister reg_S1 = Arm64ManagedRegister::FromSRegister(S1);
333   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::NoRegister()));
334   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromXRegister(X0)));
335   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromXRegister(X1)));
336   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromWRegister(W0)));
337   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S0)));
338   EXPECT_TRUE(reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S1)));
339   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D0)));
340   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D1)));
341 
342   Arm64ManagedRegister reg_S31 = Arm64ManagedRegister::FromSRegister(S31);
343   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::NoRegister()));
344   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromXRegister(X0)));
345   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromXRegister(X1)));
346   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromWRegister(W0)));
347   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S0)));
348   EXPECT_TRUE(reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S31)));
349   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D0)));
350   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D1)));
351 
352   Arm64ManagedRegister reg_D0 = Arm64ManagedRegister::FromDRegister(D0);
353   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::NoRegister()));
354   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
355   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromWRegister(W1)));
356   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
357   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
358   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S31)));
359   EXPECT_TRUE(reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
360   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D1)));
361 
362   Arm64ManagedRegister reg_D15 = Arm64ManagedRegister::FromDRegister(D15);
363   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::NoRegister()));
364   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromXRegister(X0)));
365   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromXRegister(X1)));
366   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromWRegister(W0)));
367   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S0)));
368   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S31)));
369   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D0)));
370   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D1)));
371   EXPECT_TRUE(reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D15)));
372 }
373 
TEST(Arm64ManagedRegister,Overlaps)374 TEST(Arm64ManagedRegister, Overlaps) {
375   Arm64ManagedRegister reg = Arm64ManagedRegister::FromXRegister(X0);
376   Arm64ManagedRegister reg_o = Arm64ManagedRegister::FromWRegister(W0);
377   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X0)));
378   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
379   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
380   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W0)));
381   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
382   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
383   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
384   EXPECT_EQ(X0, reg_o.AsOverlappingXRegister());
385   EXPECT_EQ(W0, reg.AsOverlappingWRegister());
386   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
387   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
388   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
389   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
390   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
391   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
392   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
393   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
394   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
395   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
396 
397   reg = Arm64ManagedRegister::FromXRegister(X10);
398   reg_o = Arm64ManagedRegister::FromWRegister(W10);
399   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X10)));
400   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
401   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
402   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W10)));
403   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
404   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
405   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
406   EXPECT_EQ(X10, reg_o.AsOverlappingXRegister());
407   EXPECT_EQ(W10, reg.AsOverlappingWRegister());
408   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
409   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
410   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
411   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
412   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
413   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
414   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
415   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
416   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
417   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
418 
419   reg = Arm64ManagedRegister::FromXRegister(IP1);
420   reg_o = Arm64ManagedRegister::FromWRegister(W17);
421   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X17)));
422   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
423   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
424   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W17)));
425   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
426   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
427   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
428   EXPECT_EQ(X17, reg_o.AsOverlappingXRegister());
429   EXPECT_EQ(W17, reg.AsOverlappingWRegister());
430   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
431   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
432   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
433   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
434   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
435   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
436   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
437   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
438   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
439   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
440 
441   reg = Arm64ManagedRegister::FromXRegister(XZR);
442   reg_o = Arm64ManagedRegister::FromWRegister(WZR);
443   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
444   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
445   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
446   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
447   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W19)));
448   EXPECT_NE(SP, reg_o.AsOverlappingXRegister());
449   EXPECT_EQ(XZR, reg_o.AsOverlappingXRegister());
450   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
451   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
452   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
453   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
454   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
455   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
456   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
457   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
458   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
459   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
460 
461   reg = Arm64ManagedRegister::FromXRegister(SP);
462   reg_o = Arm64ManagedRegister::FromWRegister(WZR);
463   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
464   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
465   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
466   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
467   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
468   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
469   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
470   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
471   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
472   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
473   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
474   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
475   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
476   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
477   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
478 
479   reg = Arm64ManagedRegister::FromWRegister(W1);
480   reg_o = Arm64ManagedRegister::FromXRegister(X1);
481   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
482   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
483   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
484   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
485   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
486   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
487   EXPECT_EQ(W1, reg_o.AsOverlappingWRegister());
488   EXPECT_EQ(X1, reg.AsOverlappingXRegister());
489   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
490   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
491   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
492   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
493   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
494   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
495   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
496   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
497   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
498   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
499 
500   reg = Arm64ManagedRegister::FromWRegister(W21);
501   reg_o = Arm64ManagedRegister::FromXRegister(X21);
502   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W21)));
503   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X21)));
504   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
505   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
506   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
507   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
508   EXPECT_EQ(W21, reg_o.AsOverlappingWRegister());
509   EXPECT_EQ(X21, reg.AsOverlappingXRegister());
510   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
511   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
512   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
513   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
514   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
515   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
516   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
517   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
518   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
519   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
520 
521 
522   reg = Arm64ManagedRegister::FromSRegister(S1);
523   reg_o = Arm64ManagedRegister::FromDRegister(D1);
524   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
525   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
526   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
527   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
528   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
529   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
530   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
531   EXPECT_EQ(S1, reg_o.AsOverlappingSRegister());
532   EXPECT_EQ(D1, reg.AsOverlappingDRegister());
533   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
534   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
535   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
536   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
537   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
538   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
539   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
540   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
541   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
542   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
543   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
544 
545   reg = Arm64ManagedRegister::FromSRegister(S15);
546   reg_o = Arm64ManagedRegister::FromDRegister(D15);
547   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
548   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
549   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
550   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
551   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
552   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
553   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
554   EXPECT_EQ(S15, reg_o.AsOverlappingSRegister());
555   EXPECT_EQ(D15, reg.AsOverlappingDRegister());
556   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
557   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
558   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
559   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17)));
560   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16)));
561   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
562   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16)));
563   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
564   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
565   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17)));
566   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
567 
568   reg = Arm64ManagedRegister::FromDRegister(D15);
569   reg_o = Arm64ManagedRegister::FromSRegister(S15);
570   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
571   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
572   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
573   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
574   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
575   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
576   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
577   EXPECT_EQ(S15, reg.AsOverlappingSRegister());
578   EXPECT_EQ(D15, reg_o.AsOverlappingDRegister());
579   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
580   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
581   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
582   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17)));
583   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16)));
584   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
585   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16)));
586   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
587   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
588   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17)));
589   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
590 }
591 
TEST(Arm64ManagedRegister,VixlRegisters)592 TEST(Arm64ManagedRegister, VixlRegisters) {
593   // X Registers.
594   EXPECT_TRUE(vixl::aarch64::x0.Is(Arm64Assembler::reg_x(X0)));
595   EXPECT_TRUE(vixl::aarch64::x1.Is(Arm64Assembler::reg_x(X1)));
596   EXPECT_TRUE(vixl::aarch64::x2.Is(Arm64Assembler::reg_x(X2)));
597   EXPECT_TRUE(vixl::aarch64::x3.Is(Arm64Assembler::reg_x(X3)));
598   EXPECT_TRUE(vixl::aarch64::x4.Is(Arm64Assembler::reg_x(X4)));
599   EXPECT_TRUE(vixl::aarch64::x5.Is(Arm64Assembler::reg_x(X5)));
600   EXPECT_TRUE(vixl::aarch64::x6.Is(Arm64Assembler::reg_x(X6)));
601   EXPECT_TRUE(vixl::aarch64::x7.Is(Arm64Assembler::reg_x(X7)));
602   EXPECT_TRUE(vixl::aarch64::x8.Is(Arm64Assembler::reg_x(X8)));
603   EXPECT_TRUE(vixl::aarch64::x9.Is(Arm64Assembler::reg_x(X9)));
604   EXPECT_TRUE(vixl::aarch64::x10.Is(Arm64Assembler::reg_x(X10)));
605   EXPECT_TRUE(vixl::aarch64::x11.Is(Arm64Assembler::reg_x(X11)));
606   EXPECT_TRUE(vixl::aarch64::x12.Is(Arm64Assembler::reg_x(X12)));
607   EXPECT_TRUE(vixl::aarch64::x13.Is(Arm64Assembler::reg_x(X13)));
608   EXPECT_TRUE(vixl::aarch64::x14.Is(Arm64Assembler::reg_x(X14)));
609   EXPECT_TRUE(vixl::aarch64::x15.Is(Arm64Assembler::reg_x(X15)));
610   EXPECT_TRUE(vixl::aarch64::x16.Is(Arm64Assembler::reg_x(X16)));
611   EXPECT_TRUE(vixl::aarch64::x17.Is(Arm64Assembler::reg_x(X17)));
612   EXPECT_TRUE(vixl::aarch64::x18.Is(Arm64Assembler::reg_x(X18)));
613   EXPECT_TRUE(vixl::aarch64::x19.Is(Arm64Assembler::reg_x(X19)));
614   EXPECT_TRUE(vixl::aarch64::x20.Is(Arm64Assembler::reg_x(X20)));
615   EXPECT_TRUE(vixl::aarch64::x21.Is(Arm64Assembler::reg_x(X21)));
616   EXPECT_TRUE(vixl::aarch64::x22.Is(Arm64Assembler::reg_x(X22)));
617   EXPECT_TRUE(vixl::aarch64::x23.Is(Arm64Assembler::reg_x(X23)));
618   EXPECT_TRUE(vixl::aarch64::x24.Is(Arm64Assembler::reg_x(X24)));
619   EXPECT_TRUE(vixl::aarch64::x25.Is(Arm64Assembler::reg_x(X25)));
620   EXPECT_TRUE(vixl::aarch64::x26.Is(Arm64Assembler::reg_x(X26)));
621   EXPECT_TRUE(vixl::aarch64::x27.Is(Arm64Assembler::reg_x(X27)));
622   EXPECT_TRUE(vixl::aarch64::x28.Is(Arm64Assembler::reg_x(X28)));
623   EXPECT_TRUE(vixl::aarch64::x29.Is(Arm64Assembler::reg_x(X29)));
624   EXPECT_TRUE(vixl::aarch64::x30.Is(Arm64Assembler::reg_x(X30)));
625 
626   EXPECT_TRUE(vixl::aarch64::x19.Is(Arm64Assembler::reg_x(TR)));
627   EXPECT_TRUE(vixl::aarch64::ip0.Is(Arm64Assembler::reg_x(IP0)));
628   EXPECT_TRUE(vixl::aarch64::ip1.Is(Arm64Assembler::reg_x(IP1)));
629   EXPECT_TRUE(vixl::aarch64::x29.Is(Arm64Assembler::reg_x(FP)));
630   EXPECT_TRUE(vixl::aarch64::lr.Is(Arm64Assembler::reg_x(LR)));
631   EXPECT_TRUE(vixl::aarch64::sp.Is(Arm64Assembler::reg_x(SP)));
632   EXPECT_TRUE(vixl::aarch64::xzr.Is(Arm64Assembler::reg_x(XZR)));
633 
634   // W Registers.
635   EXPECT_TRUE(vixl::aarch64::w0.Is(Arm64Assembler::reg_w(W0)));
636   EXPECT_TRUE(vixl::aarch64::w1.Is(Arm64Assembler::reg_w(W1)));
637   EXPECT_TRUE(vixl::aarch64::w2.Is(Arm64Assembler::reg_w(W2)));
638   EXPECT_TRUE(vixl::aarch64::w3.Is(Arm64Assembler::reg_w(W3)));
639   EXPECT_TRUE(vixl::aarch64::w4.Is(Arm64Assembler::reg_w(W4)));
640   EXPECT_TRUE(vixl::aarch64::w5.Is(Arm64Assembler::reg_w(W5)));
641   EXPECT_TRUE(vixl::aarch64::w6.Is(Arm64Assembler::reg_w(W6)));
642   EXPECT_TRUE(vixl::aarch64::w7.Is(Arm64Assembler::reg_w(W7)));
643   EXPECT_TRUE(vixl::aarch64::w8.Is(Arm64Assembler::reg_w(W8)));
644   EXPECT_TRUE(vixl::aarch64::w9.Is(Arm64Assembler::reg_w(W9)));
645   EXPECT_TRUE(vixl::aarch64::w10.Is(Arm64Assembler::reg_w(W10)));
646   EXPECT_TRUE(vixl::aarch64::w11.Is(Arm64Assembler::reg_w(W11)));
647   EXPECT_TRUE(vixl::aarch64::w12.Is(Arm64Assembler::reg_w(W12)));
648   EXPECT_TRUE(vixl::aarch64::w13.Is(Arm64Assembler::reg_w(W13)));
649   EXPECT_TRUE(vixl::aarch64::w14.Is(Arm64Assembler::reg_w(W14)));
650   EXPECT_TRUE(vixl::aarch64::w15.Is(Arm64Assembler::reg_w(W15)));
651   EXPECT_TRUE(vixl::aarch64::w16.Is(Arm64Assembler::reg_w(W16)));
652   EXPECT_TRUE(vixl::aarch64::w17.Is(Arm64Assembler::reg_w(W17)));
653   EXPECT_TRUE(vixl::aarch64::w18.Is(Arm64Assembler::reg_w(W18)));
654   EXPECT_TRUE(vixl::aarch64::w19.Is(Arm64Assembler::reg_w(W19)));
655   EXPECT_TRUE(vixl::aarch64::w20.Is(Arm64Assembler::reg_w(W20)));
656   EXPECT_TRUE(vixl::aarch64::w21.Is(Arm64Assembler::reg_w(W21)));
657   EXPECT_TRUE(vixl::aarch64::w22.Is(Arm64Assembler::reg_w(W22)));
658   EXPECT_TRUE(vixl::aarch64::w23.Is(Arm64Assembler::reg_w(W23)));
659   EXPECT_TRUE(vixl::aarch64::w24.Is(Arm64Assembler::reg_w(W24)));
660   EXPECT_TRUE(vixl::aarch64::w25.Is(Arm64Assembler::reg_w(W25)));
661   EXPECT_TRUE(vixl::aarch64::w26.Is(Arm64Assembler::reg_w(W26)));
662   EXPECT_TRUE(vixl::aarch64::w27.Is(Arm64Assembler::reg_w(W27)));
663   EXPECT_TRUE(vixl::aarch64::w28.Is(Arm64Assembler::reg_w(W28)));
664   EXPECT_TRUE(vixl::aarch64::w29.Is(Arm64Assembler::reg_w(W29)));
665   EXPECT_TRUE(vixl::aarch64::w30.Is(Arm64Assembler::reg_w(W30)));
666   EXPECT_TRUE(vixl::aarch64::w31.Is(Arm64Assembler::reg_w(WZR)));
667   EXPECT_TRUE(vixl::aarch64::wzr.Is(Arm64Assembler::reg_w(WZR)));
668   EXPECT_TRUE(vixl::aarch64::wsp.Is(Arm64Assembler::reg_w(WSP)));
669 
670   // D Registers.
671   EXPECT_TRUE(vixl::aarch64::d0.Is(Arm64Assembler::reg_d(D0)));
672   EXPECT_TRUE(vixl::aarch64::d1.Is(Arm64Assembler::reg_d(D1)));
673   EXPECT_TRUE(vixl::aarch64::d2.Is(Arm64Assembler::reg_d(D2)));
674   EXPECT_TRUE(vixl::aarch64::d3.Is(Arm64Assembler::reg_d(D3)));
675   EXPECT_TRUE(vixl::aarch64::d4.Is(Arm64Assembler::reg_d(D4)));
676   EXPECT_TRUE(vixl::aarch64::d5.Is(Arm64Assembler::reg_d(D5)));
677   EXPECT_TRUE(vixl::aarch64::d6.Is(Arm64Assembler::reg_d(D6)));
678   EXPECT_TRUE(vixl::aarch64::d7.Is(Arm64Assembler::reg_d(D7)));
679   EXPECT_TRUE(vixl::aarch64::d8.Is(Arm64Assembler::reg_d(D8)));
680   EXPECT_TRUE(vixl::aarch64::d9.Is(Arm64Assembler::reg_d(D9)));
681   EXPECT_TRUE(vixl::aarch64::d10.Is(Arm64Assembler::reg_d(D10)));
682   EXPECT_TRUE(vixl::aarch64::d11.Is(Arm64Assembler::reg_d(D11)));
683   EXPECT_TRUE(vixl::aarch64::d12.Is(Arm64Assembler::reg_d(D12)));
684   EXPECT_TRUE(vixl::aarch64::d13.Is(Arm64Assembler::reg_d(D13)));
685   EXPECT_TRUE(vixl::aarch64::d14.Is(Arm64Assembler::reg_d(D14)));
686   EXPECT_TRUE(vixl::aarch64::d15.Is(Arm64Assembler::reg_d(D15)));
687   EXPECT_TRUE(vixl::aarch64::d16.Is(Arm64Assembler::reg_d(D16)));
688   EXPECT_TRUE(vixl::aarch64::d17.Is(Arm64Assembler::reg_d(D17)));
689   EXPECT_TRUE(vixl::aarch64::d18.Is(Arm64Assembler::reg_d(D18)));
690   EXPECT_TRUE(vixl::aarch64::d19.Is(Arm64Assembler::reg_d(D19)));
691   EXPECT_TRUE(vixl::aarch64::d20.Is(Arm64Assembler::reg_d(D20)));
692   EXPECT_TRUE(vixl::aarch64::d21.Is(Arm64Assembler::reg_d(D21)));
693   EXPECT_TRUE(vixl::aarch64::d22.Is(Arm64Assembler::reg_d(D22)));
694   EXPECT_TRUE(vixl::aarch64::d23.Is(Arm64Assembler::reg_d(D23)));
695   EXPECT_TRUE(vixl::aarch64::d24.Is(Arm64Assembler::reg_d(D24)));
696   EXPECT_TRUE(vixl::aarch64::d25.Is(Arm64Assembler::reg_d(D25)));
697   EXPECT_TRUE(vixl::aarch64::d26.Is(Arm64Assembler::reg_d(D26)));
698   EXPECT_TRUE(vixl::aarch64::d27.Is(Arm64Assembler::reg_d(D27)));
699   EXPECT_TRUE(vixl::aarch64::d28.Is(Arm64Assembler::reg_d(D28)));
700   EXPECT_TRUE(vixl::aarch64::d29.Is(Arm64Assembler::reg_d(D29)));
701   EXPECT_TRUE(vixl::aarch64::d30.Is(Arm64Assembler::reg_d(D30)));
702   EXPECT_TRUE(vixl::aarch64::d31.Is(Arm64Assembler::reg_d(D31)));
703 
704   // S Registers.
705   EXPECT_TRUE(vixl::aarch64::s0.Is(Arm64Assembler::reg_s(S0)));
706   EXPECT_TRUE(vixl::aarch64::s1.Is(Arm64Assembler::reg_s(S1)));
707   EXPECT_TRUE(vixl::aarch64::s2.Is(Arm64Assembler::reg_s(S2)));
708   EXPECT_TRUE(vixl::aarch64::s3.Is(Arm64Assembler::reg_s(S3)));
709   EXPECT_TRUE(vixl::aarch64::s4.Is(Arm64Assembler::reg_s(S4)));
710   EXPECT_TRUE(vixl::aarch64::s5.Is(Arm64Assembler::reg_s(S5)));
711   EXPECT_TRUE(vixl::aarch64::s6.Is(Arm64Assembler::reg_s(S6)));
712   EXPECT_TRUE(vixl::aarch64::s7.Is(Arm64Assembler::reg_s(S7)));
713   EXPECT_TRUE(vixl::aarch64::s8.Is(Arm64Assembler::reg_s(S8)));
714   EXPECT_TRUE(vixl::aarch64::s9.Is(Arm64Assembler::reg_s(S9)));
715   EXPECT_TRUE(vixl::aarch64::s10.Is(Arm64Assembler::reg_s(S10)));
716   EXPECT_TRUE(vixl::aarch64::s11.Is(Arm64Assembler::reg_s(S11)));
717   EXPECT_TRUE(vixl::aarch64::s12.Is(Arm64Assembler::reg_s(S12)));
718   EXPECT_TRUE(vixl::aarch64::s13.Is(Arm64Assembler::reg_s(S13)));
719   EXPECT_TRUE(vixl::aarch64::s14.Is(Arm64Assembler::reg_s(S14)));
720   EXPECT_TRUE(vixl::aarch64::s15.Is(Arm64Assembler::reg_s(S15)));
721   EXPECT_TRUE(vixl::aarch64::s16.Is(Arm64Assembler::reg_s(S16)));
722   EXPECT_TRUE(vixl::aarch64::s17.Is(Arm64Assembler::reg_s(S17)));
723   EXPECT_TRUE(vixl::aarch64::s18.Is(Arm64Assembler::reg_s(S18)));
724   EXPECT_TRUE(vixl::aarch64::s19.Is(Arm64Assembler::reg_s(S19)));
725   EXPECT_TRUE(vixl::aarch64::s20.Is(Arm64Assembler::reg_s(S20)));
726   EXPECT_TRUE(vixl::aarch64::s21.Is(Arm64Assembler::reg_s(S21)));
727   EXPECT_TRUE(vixl::aarch64::s22.Is(Arm64Assembler::reg_s(S22)));
728   EXPECT_TRUE(vixl::aarch64::s23.Is(Arm64Assembler::reg_s(S23)));
729   EXPECT_TRUE(vixl::aarch64::s24.Is(Arm64Assembler::reg_s(S24)));
730   EXPECT_TRUE(vixl::aarch64::s25.Is(Arm64Assembler::reg_s(S25)));
731   EXPECT_TRUE(vixl::aarch64::s26.Is(Arm64Assembler::reg_s(S26)));
732   EXPECT_TRUE(vixl::aarch64::s27.Is(Arm64Assembler::reg_s(S27)));
733   EXPECT_TRUE(vixl::aarch64::s28.Is(Arm64Assembler::reg_s(S28)));
734   EXPECT_TRUE(vixl::aarch64::s29.Is(Arm64Assembler::reg_s(S29)));
735   EXPECT_TRUE(vixl::aarch64::s30.Is(Arm64Assembler::reg_s(S30)));
736   EXPECT_TRUE(vixl::aarch64::s31.Is(Arm64Assembler::reg_s(S31)));
737 }
738 
739 }  // namespace arm64
740 }  // namespace art
741