/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 439 bool isAdd = true; in EncodeAddrModeOpValues() local 705 bool isAdd = true; in getAddrModeImm12OpValue() local 759 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue() local 784 bool isAdd = true; in getT2AddrModeImm8s4OpValue() local 899 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; in getLdStSORegOpValue() local 942 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add; in getAddrMode2OffsetOpValue() local 962 bool isAdd = MO1.getImm() != 0; in getPostIdxRegOpValue() local 976 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OffsetOpValue() local 998 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OpValue() local 1054 bool isAdd; in getAddrMode5OpValue() local
|
D | ARMAsmBackend.cpp | 218 bool isAdd = true; in adjustFixupValue() local 369 bool isAdd = true; in adjustFixupValue() local
|
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 560 bool isAdd = true; in EncodeAddrModeOpValues() local 879 bool isAdd = true; in getAddrModeImm12OpValue() local 937 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue() local 963 bool isAdd = true; in getT2AddrModeImm8s4OpValue() local 1075 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; in getLdStSORegOpValue() local 1109 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add; in getAddrMode2OffsetOpValue() local 1130 bool isAdd = MO1.getImm() != 0; in getPostIdxRegOpValue() local 1145 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OffsetOpValue() local 1181 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OpValue() local 1241 bool isAdd; in getAddrMode5OpValue() local [all …]
|
D | ARMAsmBackend.cpp | 410 bool isAdd = true; in adjustFixupValue() local 610 bool isAdd = true; in adjustFixupValue() local 630 bool isAdd = true; in adjustFixupValue() local 657 bool isAdd = true; in adjustFixupValue() local
|
/external/apache-commons-math/src/main/java/org/apache/commons/math/fraction/ |
D | Fraction.java | 476 private Fraction addSub(Fraction fraction, boolean isAdd) { in addSub()
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 342 bool isAdd; member 1378 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local 1389 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local 1628 static ARMOperand *CreatePostIdxReg(unsigned RegNum, bool isAdd, in CreatePostIdxReg() 2695 bool isAdd = true; in parsePostIdxReg() local 2773 bool isAdd = true; in parseAM3Offset() local
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonHardwareLoops.cpp | 421 bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); in findInductionRegister() local 1602 bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); in fixupInductionVariable() local
|
/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 524 bool isAdd; member 2392 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local 2403 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local 2822 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg() 4647 bool isAdd = true; in parsePostIdxReg() local 4729 bool isAdd = true; in parseAM3Offset() local
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMCodeEmitter.cpp | 306 bool isAdd = true; in getAddrMode5OpValue() local
|
/external/valgrind/VEX/priv/ |
D | host_ppc_defs.c | 734 PPCInstr* PPCInstr_AddSubC ( Bool isAdd, Bool setC, in PPCInstr_AddSubC() 3942 Bool isAdd = i->Pin.AddSubC.isAdd; in emit_PPCInstr() local
|
D | guest_amd64_toIR.c | 15224 static IRTemp math_HADDPS_128 ( IRTemp dV, IRTemp sV, Bool isAdd ) in math_HADDPS_128() 15246 static IRTemp math_HADDPD_128 ( IRTemp dV, IRTemp sV, Bool isAdd ) in math_HADDPD_128() 15320 Bool isAdd = opc == 0x7C; in dis_ESC_0F__SSE3() local 15345 Bool isAdd = opc == 0x7C; in dis_ESC_0F__SSE3() local 26079 Bool isAdd = opc == 0x7C; in dis_ESC_0F__VEX() local 26108 Bool isAdd = opc == 0x7C; in dis_ESC_0F__VEX() local 26141 Bool isAdd = opc == 0x7C; in dis_ESC_0F__VEX() local 26170 Bool isAdd = opc == 0x7C; in dis_ESC_0F__VEX() local
|
D | host_arm64_isel.c | 1512 Bool isAdd = e->Iex.Binop.op == Iop_Add64 in iselIntExpr_R_wrk() local
|
D | guest_x86_toIR.c | 11939 Bool isAdd = insn[2] == 0x7C; in disInstr_X86_WRK() local 11984 Bool isAdd = insn[1] == 0x7C; in disInstr_X86_WRK() local
|
D | host_arm64_defs.c | 820 HReg argL, ARM64RIA* argR, Bool isAdd ) { in ARM64Instr_Arith()
|
D | host_arm64_defs.h | 536 Bool isAdd; member
|
D | host_ppc_defs.h | 570 Bool isAdd; /* else sub */ member
|
D | guest_arm64_toIR.c | 2991 Bool isAdd = INSN(15,15) == 0; in dis_ARM64_data_processing_register() local 3478 Bool isAdd = INSN(15,15) == 0; in dis_ARM64_data_processing_register() local
|
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.apache.ant_1.7.1.v20090120-1145/lib/ |
D | ant-apache-oro.jar | META-INF/
META-INF/MANIFEST.MF
org/
org/apache/
org/ ... |
/external/guice/extensions/persist/lib/ |
D | db4o-6.4.14.8131-java5.jar | META-INF/
META-INF/MANIFEST.MF
com/
com/db4o/
com/ ... |
/external/owasp/sanitizer/tools/findbugs/lib/ |
D | commons-lang-2.6.jar | META-INF/
META-INF/MANIFEST.MF
org/
org/apache/
org/ ... |
/external/libphonenumber/demo/war/WEB-INF/lib/ |
D | commons-lang-2.6.jar | META-INF/
META-INF/MANIFEST.MF
org/
org/apache/
org/ ... |
/external/guice/extensions/struts2/lib/ |
D | xwork-core-2.2.1.jar | META-INF/
META-INF/MANIFEST.MF
xwork-validator-definition-1.0. ... |
/external/v8/src/inspector/build/closure-compiler/ |
D | closure-compiler.jar | META-INF/MANIFEST.MF
META-INF/
com/
com/google/
com/ ... |