Searched defs:ld1 (Results 1 – 5 of 5) sorted by relevance
/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 783 __ ld1(v18.V16B(), v19.V16B(), v20.V16B(), v21.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local 784 __ ld1(v23.V16B(), in GenerateTestSequenceNEON() local 789 __ ld1(v5.V16B(), in GenerateTestSequenceNEON() local 794 __ ld1(v18.V16B(), v19.V16B(), v20.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local 795 __ ld1(v13.V16B(), v14.V16B(), v15.V16B(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local 796 __ ld1(v19.V16B(), v20.V16B(), v21.V16B(), MemOperand(x1, 48, PostIndex)); in GenerateTestSequenceNEON() local 797 __ ld1(v17.V16B(), v18.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local 798 __ ld1(v20.V16B(), v21.V16B(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local 799 __ ld1(v28.V16B(), v29.V16B(), MemOperand(x1, 32, PostIndex)); in GenerateTestSequenceNEON() local 800 __ ld1(v29.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local [all …]
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/external/clang/test/CodeGen/ |
D | x86_32-arguments-iamcu.c | 68 long double longDoubleArg(long double ld1) { return ld1; } in longDoubleArg()
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 1549 void Assembler::ld1(const VRegister& vt, const MemOperand& src) { in ld1() function in vixl::aarch64::Assembler 1554 void Assembler::ld1(const VRegister& vt, in ld1() function in vixl::aarch64::Assembler 1564 void Assembler::ld1(const VRegister& vt, in ld1() function in vixl::aarch64::Assembler 1575 void Assembler::ld1(const VRegister& vt, in ld1() function in vixl::aarch64::Assembler 1836 void Assembler::ld1(const VRegister& vt, int lane, const MemOperand& src) { in ld1() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 402 void Simulator::ld1(VectorFormat vform, LogicVRegister dst, uint64_t addr) { in ld1() function in vixl::aarch64::Simulator 411 void Simulator::ld1(VectorFormat vform, in ld1() function in vixl::aarch64::Simulator
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_peephole.cpp | 2291 DeadCodeElim::checkSplitLoad(Instruction *ld1) in checkSplitLoad()
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