| /art/runtime/ |
| D | dex_instruction_utils.h | 54 constexpr bool IsInstructionDirectConst(Instruction::Code opcode) { in IsInstructionDirectConst()
58 constexpr bool IsInstructionConstWide(Instruction::Code opcode) { in IsInstructionConstWide()
62 constexpr bool IsInstructionReturn(Instruction::Code opcode) { in IsInstructionReturn()
66 constexpr bool IsInstructionInvoke(Instruction::Code opcode) { in IsInstructionInvoke()
71 constexpr bool IsInstructionQuickInvoke(Instruction::Code opcode) { in IsInstructionQuickInvoke()
76 constexpr bool IsInstructionInvokeStatic(Instruction::Code opcode) { in IsInstructionInvokeStatic()
80 constexpr bool IsInstructionGoto(Instruction::Code opcode) { in IsInstructionGoto()
84 constexpr bool IsInstructionIfCc(Instruction::Code opcode) { in IsInstructionIfCc()
88 constexpr bool IsInstructionIfCcZ(Instruction::Code opcode) { in IsInstructionIfCcZ()
137 constexpr bool IsInvokeInstructionRange(Instruction::Code opcode) { in IsInvokeInstructionRange()
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| D | dex_instruction.h | 83 #define INSTRUCTION_ENUM(opcode, cname, p, f, i, a, v) cname = (opcode), argument
261 static const char* Name(Code opcode) { in Name()
456 void SetOpcode(Code opcode) { in SetOpcode()
499 static Format FormatOf(Code opcode) { in FormatOf()
504 static IndexType IndexTypeOf(Code opcode) { in IndexTypeOf()
509 static int FlagsOf(Code opcode) { in FlagsOf()
514 static int VerifyFlagsOf(Code opcode) { in VerifyFlagsOf()
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| D | dex_instruction.cc | 74 #define INSTRUCTION_SIZE(opcode, c, p, format, i, a, v) \ argument
105 Code opcode = static_cast<Code>(insn & 0xFF); in CanFlowThrough() local
168 const char* opcode = kInstructionNames[Opcode()]; in DumpString() local
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| D | dex_file.cc | 1020 uint8_t opcode = *stream++; in DecodeDebugLocalInfo() local
1131 uint8_t opcode = *stream++; in DecodeDebugPositionInfo() local
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| /art/tools/dexfuzz/src/dexfuzz/rawdex/ |
| D | OpcodeInfo.java | 27 public final Opcode opcode; field in OpcodeInfo
35 public OpcodeInfo(Opcode opcode, String name, int opcodeValue, AbstractFormat fmt) { in OpcodeInfo()
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| D | CodeItem.java | 149 Opcode opcode = insn.info.opcode; in incrementIndex() local
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| D | Opcode.java | 277 public static boolean isBetween(Opcode opcode, Opcode opcode1, Opcode opcode2) { in isBetween()
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| /art/compiler/dex/ |
| D | inline_method_analyser.h | 84 InlineMethodOpcode opcode; member
104 static constexpr bool IsInstructionIGet(Instruction::Code opcode) { in IsInstructionIGet()
108 static constexpr bool IsInstructionIPut(Instruction::Code opcode) { in IsInstructionIPut()
112 static constexpr uint16_t IGetVariant(Instruction::Code opcode) { in IGetVariant()
116 static constexpr uint16_t IPutVariant(Instruction::Code opcode) { in IPutVariant()
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| D | inline_method_analyser.cc | 449 Instruction::Code opcode = instruction->Opcode(); in AnalyseMethodCode() local
577 Instruction::Code opcode = instruction->Opcode(); in AnalyseIGetMethod() local
641 Instruction::Code opcode = instruction->Opcode(); in AnalyseIPutMethod() local
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| /art/tools/dexfuzz/src/dexfuzz/program/mutators/ |
| D | CmpBiasChanger.java | 134 Opcode opcode = mInsn.insn.info.opcode; in getLegalDifferentOpcode() local
148 Opcode opcode = mInsn.insn.info.opcode; in isCmpBiasOperation() local
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| D | ArithOpChanger.java | 151 Opcode opcode = mInsn.insn.info.opcode; in isArithmeticOperation() local
159 Opcode opcode = mInsn.insn.info.opcode; in getLegalDifferentOpcode() local
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| D | InstructionDuplicator.java | 74 Opcode opcode = oldInsn.insn.info.opcode; in generateMutation() local
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| D | ConversionRepeater.java | 194 Opcode opcode = mInsn.insn.info.opcode; in isConversionInstruction() local
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| D | FieldFlagChanger.java | 156 Opcode opcode = mInsn.insn.info.opcode; in isFileDefinedFieldInstruction() local
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| D | ValuePrinter.java | 216 Opcode opcode = mInsn.insn.info.opcode; in getInstructionOutputType() local
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| /art/tools/dexfuzz/src/dexfuzz/program/ |
| D | CodeTranslator.java | 578 Opcode opcode = insn.info.opcode; in isInstructionBranch() local
590 Opcode opcode = insn.info.opcode; in isInstructionSwitch() local
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| /art/compiler/debug/dwarf/ |
| D | debug_line_opcode_writer.h | 180 int opcode = kOpcodeBase + (delta_line - kLineBase) + in AddRow() local
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| /art/compiler/utils/arm/ |
| D | assembler_thumb2.cc | 515 Opcode opcode, in ShifterOperandCanHold()
1176 Opcode opcode, in Is32BitDataProcessing()
1339 Opcode opcode, in Emit32BitDataProcessing()
1426 Opcode opcode, in Emit16BitDataProcessing()
1617 Opcode opcode, in Emit16BitAddSub()
1777 Opcode opcode, in EmitDataProcessing()
1801 uint16_t opcode = 0; in EmitShift() local
1822 uint16_t opcode = 0; in EmitShift() local
1851 uint16_t opcode = 0; in EmitShift() local
1868 uint16_t opcode = 0; in EmitShift() local
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| D | assembler_arm_vixl.cc | 93 bool ArmVIXLAssembler::ShifterOperandCanHold(Opcode opcode, uint32_t immediate, SetCc set_cc) { in ShifterOperandCanHold()
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| D | assembler_arm.h | 840 Opcode opcode, in ShifterOperandCanHold()
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| /art/disassembler/ |
| D | disassembler_mips.cc | 469 std::string opcode; in Dump() local
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| /art/runtime/arch/x86/ |
| D | fault_handler_x86.cc | 113 uint8_t opcode = *pc; in GetInstructionSize() local
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 99 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, in EmitR()
113 void Mips64Assembler::EmitRsd(int opcode, GpuRegister rs, GpuRegister rd, in EmitRsd()
126 void Mips64Assembler::EmitRtd(int opcode, GpuRegister rt, GpuRegister rd, in EmitRtd()
139 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) { in EmitI()
149 void Mips64Assembler::EmitI21(int opcode, GpuRegister rs, uint32_t imm21) { in EmitI21()
158 void Mips64Assembler::EmitI26(int opcode, uint32_t imm26) { in EmitI26()
164 void Mips64Assembler::EmitFR(int opcode, int fmt, FpuRegister ft, FpuRegister fs, FpuRegister fd, in EmitFR()
178 void Mips64Assembler::EmitFI(int opcode, int fmt, FpuRegister ft, uint16_t imm) { in EmitFI()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 331 uint32_t MipsAssembler::EmitR(int opcode, in EmitR()
350 uint32_t MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { in EmitI()
361 uint32_t MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) { in EmitI21()
371 uint32_t MipsAssembler::EmitI26(int opcode, uint32_t imm26) { in EmitI26()
378 uint32_t MipsAssembler::EmitFR(int opcode, in EmitFR()
397 uint32_t MipsAssembler::EmitFI(int opcode, int fmt, FRegister ft, uint16_t imm) { in EmitFI()
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| /art/dexlayout/ |
| D | dex_ir.cc | 94 uint8_t opcode = *stream++; in GetDebugInfoStreamSize() local
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