| /art/runtime/gc/accounting/ |
| D | bitmap-inl.h | 89 const size_t shift = CTZ(left_edge); in VisitSetBits() local
101 const size_t shift = CTZ(w); in VisitSetBits() local
125 const size_t shift = CTZ(right_edge); in VisitSetBits() local
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| D | space_bitmap-inl.h | 110 const size_t shift = CTZ(left_edge); in VisitMarkedRange() local
123 const size_t shift = CTZ(w); in VisitMarkedRange() local
149 const size_t shift = CTZ(right_edge); in VisitMarkedRange() local
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| D | space_bitmap.cc | 151 const size_t shift = CTZ(w); in Walk() local
199 const size_t shift = CTZ(garbage); in SweepWalk() local
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| /art/tools/dexfuzz/src/dexfuzz/rawdex/ |
| D | DexRandomAccessFile.java | 99 int shift = 0; in readUleb128() local
179 int shift = 0; in readSleb128() local
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| /art/compiler/optimizing/ |
| D | code_generator_utils.cc | 25 int64_t* magic, int* shift) { in CalculateMagicAndShiftForDivRem()
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| D | instruction_simplifier.cc | 1049 size_t shift = Int64FromConstant(input_other->InputAt(1)->AsConstant()) & (reg_bits - 1); in VisitAnd() local
1387 HIntConstant* shift = GetGraph()->GetIntConstant(WhichPowerOf2(factor)); in VisitMul() local
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| D | code_generator_vector_arm64.cc | 787 size_t shift = Primitive::ComponentSizeShift(packed_type); in CreateVecMemRegisters() local
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| D | code_generator_x86.cc | 3504 int shift = CTZ(imm); in DivByPowerOfTwo() local
3542 int shift; in GenerateDivRemWithAnyConstant() local
3933 int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance; in HandleShift() local
3961 int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance; in HandleShift() local
3980 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, int shift) { in GenerateShlLong()
4019 void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, int shift) { in GenerateShrLong()
4051 void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, int shift) { in GenerateUShrLong()
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| D | intrinsics_x86_64.cc | 2546 static void SwapBits(CpuRegister reg, CpuRegister temp, int32_t shift, int32_t mask, in SwapBits()
2591 int32_t shift, int64_t mask, X86_64Assembler* assembler) { in SwapBits64()
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| D | code_generator_x86_64.cc | 3531 int shift = CTZ(imm); in DivByPowerOfTwo() local
3547 int shift = CTZ(imm); in DivByPowerOfTwo() local
3580 int shift; in GenerateDivRemWithAnyConstant() local
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| D | code_generator_arm_vixl.cc | 1542 static Operand GetShifterOperand(vixl32::Register rm, ShiftType shift, uint32_t shift_imm) { in GetShifterOperand()
1563 const ShiftType shift = ShiftFromOpKind(instruction->GetOpKind()); in GenerateLongDataProc() local
4097 int shift; in GenerateDivRemWithAnyConstant() local
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| D | code_generator_arm.cc | 1454 static ShifterOperand GetShifterOperand(Register rm, Shift shift, uint32_t shift_imm) { in GetShifterOperand()
1474 const Shift shift = ShiftFromOpKind(instruction->GetOpKind()); in GenerateLongDataProc() local
4104 int shift; in GenerateDivRemWithAnyConstant() local
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| /art/test/458-checker-instruct-simplification/src/ |
| D | Main.java | 1910 public static int $noinline$intUnnecessaryShiftMasking(int value, int shift) { in $noinline$intUnnecessaryShiftMasking()
1929 public static long $noinline$longUnnecessaryShiftMasking(long value, int shift) { in $noinline$longUnnecessaryShiftMasking()
1948 public static int $noinline$intUnnecessaryWiderShiftMasking(int value, int shift) { in $noinline$intUnnecessaryWiderShiftMasking()
1969 public static long $noinline$longSmallerShiftMasking(long value, int shift) { in $noinline$longSmallerShiftMasking()
1992 public static int $noinline$otherUseOfUnnecessaryShiftMasking(int value, int shift) { in $noinline$otherUseOfUnnecessaryShiftMasking()
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| /art/compiler/jni/quick/arm/ |
| D | calling_convention_arm.cc | 294 size_t shift = 0; in ArmJniCallingConvention() local
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| /art/runtime/ |
| D | memory_region.h | 141 const uint32_t shift = bit_offset & (kBitsPerByte - 1); in LoadBits() local
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| /art/compiler/utils/arm/ |
| D | assembler_arm.cc | 180 uint32_t shift = shift_; in encodingArm() local
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| D | assembler_arm_test.h | 413 for (const SOp& shift : shifts) { in RepeatTemplatedRSC() local
469 for (const SOp& shift : shifts) { in RepeatTemplatedRRSC() local
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| D | assembler_arm.h | 148 ShifterOperand(Register rm, Shift shift, Register rs) : type_(kRegister), rm_(rm), in ShifterOperand()
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| D | constants_arm.h | 265 int Bits(int shift, int count) const { in Bits()
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| D | assembler_thumb2.cc | 1794 Shift shift, in EmitShift()
1839 Shift shift, in EmitShift()
3229 static uint8_t ToItMask(ItState s, uint8_t firstcond0, uint8_t shift) { in ToItMask()
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| /art/compiler/linker/arm64/ |
| D | relative_patcher_arm64.cc | 214 uint32_t shift = wide ? 3u : 2u; in PatchPcRelativeReference() local
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| /art/dexlayout/ |
| D | dex_ir.cc | 36 int shift = (7 - length) * 8; in ReadVarWidth() local
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| /art/dexdump/ |
| D | dexdump.cc | 429 int shift = (7 - arg) * 8; in readVarWidth() local
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| /art/runtime/interpreter/mterp/mips/ |
| D | header.S | 607 #define EASN(rd, rbase, roff, shift) LSA(rd, roff, rbase, shift) argument
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| /art/runtime/interpreter/mterp/out/ |
| D | mterp_mips.S | 614 #define EASN(rd, rbase, roff, shift) LSA(rd, roff, rbase, shift) argument
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