1//
2//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3//
4//  This program and the accompanying materials
5//  are licensed and made available under the terms and conditions of the BSD License
6//  which accompanies this distribution.  The full text of the license may be found at
7//  http://opensource.org/licenses/bsd-license.php
8//
9//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11//
12//
13
14#include <AsmMacroIoLib.h>
15#include <Base.h>
16#include <Library/PcdLib.h>
17#include <AutoGen.h>
18
19.text
20.align 3
21
22GCC_ASM_IMPORT(CEntryPoint)
23GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
24GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
25GCC_ASM_IMPORT(ArmReadMpidr)
26GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
27GCC_ASM_EXPORT(_ModuleEntryPoint)
28
29StartupAddr: .word    CEntryPoint
30
31ASM_PFX(_ModuleEntryPoint):
32  // Do early platform specific actions
33  bl    ASM_PFX(ArmPlatformPeiBootAction)
34
35  // Identify CPU ID
36  bl    ASM_PFX(ArmReadMpidr)
37  // Keep a copy of the MpId register value
38  mov   r5, r0
39
40  // Is it the Primary Core ?
41  bl    ASM_PFX(ArmPlatformIsPrimaryCore)
42
43  // Get the top of the primary stacks (and the base of the secondary stacks)
44  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
45  LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
46  add   r1, r1, r2
47
48  // r0 is equal to 1 if I am the primary core
49  cmp   r0, #1
50  beq   _SetupPrimaryCoreStack
51
52_SetupSecondaryCoreStack:
53  // r1 contains the base of the secondary stacks
54
55  // Get the Core Position
56  mov   r6, r1      // Save base of the secondary stacks
57  mov   r0, r5
58  bl    ASM_PFX(ArmPlatformGetCorePosition)
59  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
60  add   r0, r0, #1
61
62  // StackOffset = CorePos * StackSize
63  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
64  mul   r0, r0, r2
65  // SP = StackBase + StackOffset
66  add   sp, r6, r0
67
68_PrepareArguments:
69  // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
70  LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
71  add   r2, r2, #4
72  ldr   r1, [r2]
73
74  // Move sec startup address into a data register
75  // Ensure we're jumping to FV version of the code (not boot remapped alias)
76  ldr   r3, StartupAddr
77
78  // Jump to PrePeiCore C code
79  //    r0 = mp_id
80  //    r1 = pei_core_address
81  mov   r0, r5
82  blx   r3
83
84_SetupPrimaryCoreStack:
85  mov   sp, r1
86  b     _PrepareArguments
87
88_NeverReturn:
89  b _NeverReturn
90