1//
2//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3//
4//  This program and the accompanying materials
5//  are licensed and made available under the terms and conditions of the BSD License
6//  which accompanies this distribution.  The full text of the license may be found at
7//  http://opensource.org/licenses/bsd-license.php
8//
9//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11//
12//
13
14#include <AsmMacroIoLib.h>
15#include <Base.h>
16#include <Library/PcdLib.h>
17#include <AutoGen.h>
18
19  INCLUDE AsmMacroIoLib.inc
20
21  IMPORT  CEntryPoint
22  IMPORT  ArmPlatformGetCorePosition
23  IMPORT  ArmPlatformIsPrimaryCore
24  IMPORT  ArmReadMpidr
25  IMPORT  ArmPlatformPeiBootAction
26  EXPORT  _ModuleEntryPoint
27
28  PRESERVE8
29  AREA    PrePeiCoreEntryPoint, CODE, READONLY
30
31StartupAddr        DCD      CEntryPoint
32
33_ModuleEntryPoint
34  // Do early platform specific actions
35  bl    ArmPlatformPeiBootAction
36
37  // Identify CPU ID
38  bl    ArmReadMpidr
39  // Keep a copy of the MpId register value
40  mov   r5, r0
41
42  // Is it the Primary Core ?
43  bl    ArmPlatformIsPrimaryCore
44
45  // Get the top of the primary stacks (and the base of the secondary stacks)
46  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
47  LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
48  add   r1, r1, r2
49
50  // r0 is equal to 1 if I am the primary core
51  cmp   r0, #1
52  beq   _SetupPrimaryCoreStack
53
54_SetupSecondaryCoreStack
55  // r1 contains the base of the secondary stacks
56
57  // Get the Core Position
58  mov   r6, r1      // Save base of the secondary stacks
59  mov   r0, r5
60  bl    ArmPlatformGetCorePosition
61  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
62  add   r0, r0, #1
63
64  // StackOffset = CorePos * StackSize
65  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
66  mul   r0, r0, r2
67  // SP = StackBase + StackOffset
68  add   sp, r6, r0
69
70_PrepareArguments
71  // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
72  LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
73  add   r2, r2, #4
74  ldr   r1, [r2]
75
76  // Move sec startup address into a data register
77  // Ensure we're jumping to FV version of the code (not boot remapped alias)
78  ldr   r3, StartupAddr
79
80  // Jump to PrePeiCore C code
81  //    r0 = mp_id
82  //    r1 = pei_core_address
83  mov   r0, r5
84  blx   r3
85
86_SetupPrimaryCoreStack
87  mov   sp, r1
88  b     _PrepareArguments
89
90_NeverReturn
91  b _NeverReturn
92
93  END
94