1/*++ 2 3Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved 4 5 This program and the accompanying materials are licensed and made available under 6 the terms and conditions of the BSD License that accompanies this distribution. 7 The full text of the license may be found at 8 http://opensource.org/licenses/bsd-license.php. 9 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 13 14 15Module Name: 16 17 IgdOpRn.ASL 18 19Abstract: 20 21 IGD OpRegion/Software SCI Reference Code for the Baytrail Family. 22 This file contains the interrupt handler code for the Integrated 23 Graphics Device (IGD) OpRegion/Software SCI mechanism. 24 25--*/ 26 27 28//NOTES: 29// 30// (1) The code contained in this file inherits the scope in which it 31// was included. So BIOS developers must be sure to include this 32// file in the scope associated with the graphics device 33// (ex. \_SB.PCI0.GFX0). 34// (2) Create a _L06 method under the GPE scope to handle the event 35// generated by the graphics driver. The _L06 method must call 36// the GSCI method in this file. 37// (3) The MCHP operation region assumes that _ADR and _BBN names 38// corresponding to bus 0, device0, function 0 have been declared 39// under the PCI0 scope. 40// (4) Before the first execution of the GSCI method, the base address 41// of the GMCH SCI OpRegion must be programmed where the driver can 42// access it. A 32bit scratch register at 0xFC in the IGD PCI 43// configuration space (B0/D2/F0/R0FCh) is used for this purpose. 44 45// Define an OperationRegion to cover the GMCH PCI configuration space as 46// described in the IGD OpRegion specificiation. 47 48// Define an OperationRegion to cover the IGD PCI configuration space as 49// described in the IGD OpRegion specificiation. 50 51OperationRegion(IGDP, PCI_Config,0x00,0x100) 52Field(IGDP, AnyAcc, NoLock, Preserve) 53{ 54 Offset(0x10), // GTTMMADR 55 MADR, 32, 56 Offset(0x50), // GMCH Graphics Control Register 57 , 1, 58 GIVD, 1, // IGD VGA disable bit 59 , 1, 60 GUMA, 5, // Stolen memory size 61 , 8, 62 Offset(0x54), 63 , 4, 64 GMFN, 1, // Gfx function 1 enable 65 , 27, 66 Offset(0x5C), // Stolen Memory Base Address 67 GSTM, 32, 68 Offset(0xE0), // Reg 0xE8, SWSCI control register 69 GSSE, 1, // Graphics SCI event (1=event pending) 70 GSSB, 14, // Graphics SCI scratchpad bits 71 GSES, 1, // Graphics event select (1=SCI) 72 Offset(0xE4), 73 ASLE, 8, // Reg 0xE4, ASLE interrupt register 74 , 24, // Only use first byte of ASLE reg 75 Offset(0xFC), 76 ASLS, 32, // Reg 0xFC, Address of the IGD OpRegion 77} 78 79Method (MCHK, 0, Serialized) 80{ 81 82 If (LNotEqual (MADR, 0xFFFFFFFF)) 83 { 84 OperationRegion(IGMM,SystemMemory,MADR,0x3000) 85 Field(IGMM,AnyAcc, NoLock, Preserve) 86 { 87 Offset(0X20C8), 88 , 4, 89 DCFE, 4, // DISPLAY_CLOCK_FREQUENCY_ENCODING 90 } 91 } 92} 93 94 95// Define an OperationRegion to cover the IGD OpRegion layout. 96 97OperationRegion(IGDM, SystemMemory, ASLB, 0x2000) 98Field(IGDM, AnyAcc, NoLock, Preserve) 99{ 100 101 // OpRegion Header 102 103 SIGN, 128, // Signature-"IntelGraphicsMem" 104 SIZE, 32, // OpRegion Size 105 OVER, 32, // OpRegion Version 106 SVER, 256, // System BIOS Version 107 VVER, 128, // VBIOS Version 108 GVER, 128, // Driver version 109 MBOX, 32, // Mailboxes supported 110 DMOD, 32, // Driver Model 111 PCON, 32, // 96, Platform Configuration 112 113 // OpRegion Mailbox 1 (Public ACPI Methods) 114 // Note: Mailbox 1 is normally reserved for desktop platforms. 115 116 Offset(0x100), 117 DRDY, 32, // Driver readiness (ACPI notification) 118 CSTS, 32, // Notification status 119 CEVT, 32, // Current event 120 Offset(0x120), 121 DIDL, 32, // Supported display device ID list 122 DDL2, 32, // Allows for 8 devices 123 DDL3, 32, 124 DDL4, 32, 125 DDL5, 32, 126 DDL6, 32, 127 DDL7, 32, 128 DDL8, 32, 129 CPDL, 32, // Currently present display list 130 CPL2, 32, // Allows for 8 devices 131 CPL3, 32, 132 CPL4, 32, 133 CPL5, 32, 134 CPL6, 32, 135 CPL7, 32, 136 CPL8, 32, 137 CAD1, 32, // Currently active display list 138 CAL2, 32, // Allows for 8 devices 139 CAL3, 32, 140 CAL4, 32, 141 CAL5, 32, 142 CAL6, 32, 143 CAL7, 32, 144 CAL8, 32, 145 NADL, 32, // Next active display list 146 NDL2, 32, // Allows for 8 devices 147 NDL3, 32, 148 NDL4, 32, 149 NDL5, 32, 150 NDL6, 32, 151 NDL7, 32, 152 NDL8, 32, 153 ASLP, 32, // ASL sleep timeout 154 TIDX, 32, // Toggle table index 155 CHPD, 32, // Current hot plug enable indicator 156 CLID, 32, // Current lid state indicator 157 CDCK, 32, // Current docking state indicator 158 SXSW, 32, // Display switch notify on resume 159 EVTS, 32, // Events supported by ASL (diag only) 160 CNOT, 32, // Current OS notifications (diag only) 161 NRDY, 32, 162 163 // OpRegion Mailbox 2 (Software SCI Interface) 164 165 Offset(0x200), // SCIC 166 SCIE, 1, // SCI entry bit (1=call unserviced) 167 GEFC, 4, // Entry function code 168 GXFC, 3, // Exit result 169 GESF, 8, // Entry/exit sub-function/parameter 170 , 16, // SCIC[31:16] reserved 171 Offset(0x204), // PARM 172 PARM, 32, // PARM register (extra parameters) 173 DSLP, 32, // Driver sleep time out 174 175 // OpRegion Mailbox 3 (BIOS to Driver Notification) 176 // Note: Mailbox 3 is normally reserved for desktop platforms. 177 178 Offset(0x300), 179 ARDY, 32, // Driver readiness (power conservation) 180 ASLC, 32, // ASLE interrupt command/status 181 TCHE, 32, // Technology enabled indicator 182 ALSI, 32, // Current ALS illuminance reading 183 BCLP, 32, // Backlight brightness 184 PFIT, 32, // Panel fitting state or request 185 CBLV, 32, // Current brightness level 186 BCLM, 320, // Backlight brightness level duty cycle mapping table 187 CPFM, 32, // Current panel fitting mode 188 EPFM, 32, // Enabled panel fitting modes 189 PLUT, 592, // Optional. 74-byte Panel LUT Table 190 PFMB, 32, // Optional. PWM Frequency and Minimum Brightness 191 CCDV, 32, // Optional. Gamma, Brightness, Contrast values. 192 PCFT, 32, // Optional. Power Conservation Features 193 194 Offset(0x3B6), 195 STAT, 32, // Status register 196 197 // OpRegion Mailbox 4 (VBT) 198 199 Offset(0x400), 200 GVD1, 0xC000, // 6K bytes maximum VBT image 201 202 // OpRegion Mailbox 5 (BIOS to Driver Notification Extension) 203 204 Offset(0x1C00), 205 PHED, 32, // Panel Header 206 BDDC, 2048, // Panel EDID (Max 256 bytes) 207 208} 209 210 211 212// Convert boot display type into a port mask. 213 214Name (DBTB, Package() 215{ 216 0x0000, // Automatic 217 0x0007, // Port-0 : Integrated CRT 218 0x0038, // Port-1 : DVO-A, or Integrated LVDS 219 0x01C0, // Port-2 : SDVO-B, or SDVO-B/C 220 0x0E00, // Port-3 : SDVO-C 221 0x003F, // [CRT + DVO-A / Integrated LVDS] 222 0x01C7, // [CRT + SDVO-B] or [CRT + SDVO-B/C] 223 0x0E07, // [CRT + SDVO-C] 224 0x01F8, // [DVO-A / Integrated LVDS + SDVO-B] 225 0x0E38, // [DVO-A / Integrated LVDS + SDVO-C] 226 0x0FC0, // [SDVO-B + SDVO-C] 227 0x0000, // Reserved 228 0x0000, // Reserved 229 0x0000, // Reserved 230 0x0000, // Reserved 231 0x0000, // Reserved 232 0x7000, // Port-4: Integrated TV 233 0x7007, // [Integrated TV + CRT] 234 0x7038, // [Integrated TV + LVDS] 235 0x71C0, // [Integrated TV + DVOB] 236 0x7E00 // [Integrated TV + DVOC] 237}) 238 239// Core display clock value table. 240 241Name (CDCT, Package() 242{ 243 Package() {160}, 244 Package() {200}, 245 Package() {267}, 246 Package() {320}, 247 Package() {356}, 248 Package() {400}, 249}) 250 251// Defined exit result values: 252 253Name (SUCC, 1) // Exit result: Success 254Name (NVLD, 2) // Exit result: Invalid parameter 255Name (CRIT, 4) // Exit result: Critical failure 256Name (NCRT, 6) // Exit result: Non-critical failure 257 258 259/************************************************************************; 260;* 261;* Name: GSCI 262;* 263;* Description: Handles an SCI generated by the graphics driver. The 264;* PARM and SCIC input fields are parsed to determine the 265;* functionality requested by the driver. GBDA or SBCB 266;* is called based on the input data in SCIC. 267;* 268;* Usage: The method must be called in response to a GPE 06 event 269;* which will be generated by the graphics driver. 270;* Ex: Method(\_GPE._L06) {Return(\_SB.PCI0.GFX0.GSCI())} 271;* 272;* Input: PARM and SCIC are indirect inputs 273;* 274;* Output: PARM and SIC are indirect outputs 275;* 276;* References: GBDA (Get BIOS Data method), SBCB (System BIOS Callback 277;* method) 278;* 279;************************************************************************/ 280 281Method (GSCI, 0, Serialized) 282{ 283 Include("IgdOGBDA.ASL") // "Get BIOS Data" Functions 284 Include("IgdOSBCB.ASL") // "System BIOS CallBacks" 285 286 If (LEqual(GEFC, 4)) 287 { 288 Store(GBDA(), GXFC) // Process Get BIOS Data functions 289 } 290 291 If (LEqual(GEFC, 6)) 292 { 293 Store(SBCB(), GXFC) // Process BIOS Callback functions 294 } 295 296 Store(0, GEFC) // Wipe out the entry function code 297 Store(1, SCIS) // Clear the GUNIT SCI status bit in PCH ACPI I/O space. 298 Store(0, GSSE) // Clear the SCI generation bit in PCI space. 299 Store(0, SCIE) // Clr SCI serviced bit to signal completion 300 301 Return(Zero) 302} 303 304// Include MOBLFEAT.ASL for mobile systems only. Remove for desktop. 305Include("IgdOMOBF.ASL") // IGD SCI mobile features 306