1 /* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */
2 /* $NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $ */
3
4 /*-
5 * Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <fenv.h>
31
32 /*
33 * The i387 defaults to Intel extended precision mode and round to nearest,
34 * with all exceptions masked.
35 */
36 #define __INITIAL_NPXCW__ 0x037f
37 #define __INITIAL_MXCSR__ 0x1f80
38 #define __INITIAL_MXCSR_MASK__ 0xffbf
39
40 #define SSE_MASK_SHIFT 7
41
42 /*
43 * The following symbol is simply the bitwise-inclusive OR of all floating-point
44 * rounding direction constants defined above.
45 */
46 #define X87_ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | FE_UPWARD | FE_TOWARDZERO)
47 #define SSE_ROUND_SHIFT 3
48
49 /*
50 * The following constant represents the default floating-point environment
51 * (that is, the one installed at program startup) and has type pointer to
52 * const-qualified fenv_t.
53 *
54 * It can be used as an argument to the functions within the <fenv.h> header
55 * that manage the floating-point environment, namely fesetenv() and
56 * feupdateenv().
57 *
58 * x87 fpu registers are 16bit wide. The upper bits, 31-16, are marked as
59 * RESERVED.
60 */
61 const fenv_t __fe_dfl_env = {
62 {
63 0xffff0000 | __INITIAL_NPXCW__, /* Control word register */
64 0xffff0000, /* Status word register */
65 0xffffffff, /* Tag word register */
66 {
67 0x00000000,
68 0x00000000,
69 0x00000000,
70 0xffff0000
71 }
72 },
73 __INITIAL_MXCSR__ /* MXCSR register */
74 };
75
76
77 /*
78 * The feclearexcept() function clears the supported floating-point exceptions
79 * represented by `excepts'.
80 */
81 int
feclearexcept(int excepts)82 feclearexcept(int excepts)
83 {
84 fenv_t fenv;
85 unsigned int mxcsr;
86
87 excepts &= FE_ALL_EXCEPT;
88
89 /* Store the current x87 floating-point environment */
90 __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
91
92 /* Clear the requested floating-point exceptions */
93 fenv.__x87.__status &= ~excepts;
94
95 /* Load the x87 floating-point environent */
96 __asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
97
98 /* Same for SSE environment */
99 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
100 mxcsr &= ~excepts;
101 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
102
103 return (0);
104 }
105
106 /*
107 * The fegetexceptflag() function stores an implementation-defined
108 * representation of the states of the floating-point status flags indicated by
109 * the argument excepts in the object pointed to by the argument flagp.
110 */
111 int
fegetexceptflag(fexcept_t * flagp,int excepts)112 fegetexceptflag(fexcept_t *flagp, int excepts)
113 {
114 unsigned short status;
115 unsigned int mxcsr;
116
117 excepts &= FE_ALL_EXCEPT;
118
119 /* Store the current x87 status register */
120 __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
121
122 /* Store the MXCSR register */
123 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
124
125 /* Store the results in flagp */
126 *flagp = (status | mxcsr) & excepts;
127
128 return (0);
129 }
130
131 /*
132 * The feraiseexcept() function raises the supported floating-point exceptions
133 * represented by the argument `excepts'.
134 *
135 * The standard explicitly allows us to execute an instruction that has the
136 * exception as a side effect, but we choose to manipulate the status register
137 * directly.
138 *
139 * The validation of input is being deferred to fesetexceptflag().
140 */
141 int
feraiseexcept(int excepts)142 feraiseexcept(int excepts)
143 {
144 excepts &= FE_ALL_EXCEPT;
145
146 fesetexceptflag((fexcept_t *)&excepts, excepts);
147 __asm__ __volatile__ ("fwait");
148
149 return (0);
150 }
151
152 /*
153 * This function sets the floating-point status flags indicated by the argument
154 * `excepts' to the states stored in the object pointed to by `flagp'. It does
155 * NOT raise any floating-point exceptions, but only sets the state of the flags.
156 */
157 int
fesetexceptflag(const fexcept_t * flagp,int excepts)158 fesetexceptflag(const fexcept_t *flagp, int excepts)
159 {
160 fenv_t fenv;
161 unsigned int mxcsr;
162
163 excepts &= FE_ALL_EXCEPT;
164
165 /* Store the current x87 floating-point environment */
166 __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
167
168 /* Set the requested status flags */
169 fenv.__x87.__status &= ~excepts;
170 fenv.__x87.__status |= *flagp & excepts;
171
172 /* Load the x87 floating-point environent */
173 __asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
174
175 /* Same for SSE environment */
176 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
177 mxcsr &= ~excepts;
178 mxcsr |= *flagp & excepts;
179 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
180
181 return (0);
182 }
183
184 /*
185 * The fetestexcept() function determines which of a specified subset of the
186 * floating-point exception flags are currently set. The `excepts' argument
187 * specifies the floating-point status flags to be queried.
188 */
189 int
fetestexcept(int excepts)190 fetestexcept(int excepts)
191 {
192 unsigned short status;
193 unsigned int mxcsr;
194
195 excepts &= FE_ALL_EXCEPT;
196
197 /* Store the current x87 status register */
198 __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
199
200 /* Store the MXCSR register state */
201 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
202
203 return ((status | mxcsr) & excepts);
204 }
205
206 /*
207 * The fegetround() function gets the current rounding direction.
208 */
209 int
fegetround(void)210 fegetround(void)
211 {
212 unsigned short control;
213
214 /*
215 * We assume that the x87 and the SSE unit agree on the
216 * rounding mode. Reading the control word on the x87 turns
217 * out to be about 5 times faster than reading it on the SSE
218 * unit on an Opteron 244.
219 */
220 __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
221
222 return (control & X87_ROUND_MASK);
223 }
224
225 /*
226 * The fesetround() function establishes the rounding direction represented by
227 * its argument `round'. If the argument is not equal to the value of a rounding
228 * direction macro, the rounding direction is not changed.
229 */
230 int
fesetround(int round)231 fesetround(int round)
232 {
233 unsigned short control;
234 unsigned int mxcsr;
235
236 /* Check whether requested rounding direction is supported */
237 if (round & ~X87_ROUND_MASK)
238 return (-1);
239
240 /* Store the current x87 control word register */
241 __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
242
243 /* Set the rounding direction */
244 control &= ~X87_ROUND_MASK;
245 control |= round;
246
247 /* Load the x87 control word register */
248 __asm__ __volatile__ ("fldcw %0" : : "m" (control));
249
250 /* Same for the SSE environment */
251 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
252 mxcsr &= ~(X87_ROUND_MASK << SSE_ROUND_SHIFT);
253 mxcsr |= round << SSE_ROUND_SHIFT;
254 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
255
256 return (0);
257 }
258
259 /*
260 * The fegetenv() function attempts to store the current floating-point
261 * environment in the object pointed to by envp.
262 */
263 int
fegetenv(fenv_t * envp)264 fegetenv(fenv_t *envp)
265 {
266 /* Store the current x87 floating-point environment */
267 __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
268
269 /* Store the MXCSR register state */
270 __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
271
272 /*
273 * When an FNSTENV instruction is executed, all pending exceptions are
274 * essentially lost (either the x87 FPU status register is cleared or
275 * all exceptions are masked).
276 *
277 * 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
278 * Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
279 */
280 __asm__ __volatile__ ("fldcw %0" : : "m" (envp->__x87.__control));
281
282 return (0);
283 }
284
285 /*
286 * The feholdexcept() function saves the current floating-point environment
287 * in the object pointed to by envp, clears the floating-point status flags, and
288 * then installs a non-stop (continue on floating-point exceptions) mode, if
289 * available, for all floating-point exceptions.
290 */
291 int
feholdexcept(fenv_t * envp)292 feholdexcept(fenv_t *envp)
293 {
294 unsigned int mxcsr;
295
296 /* Store the current x87 floating-point environment */
297 __asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
298
299 /* Clear all exception flags in FPU */
300 __asm__ __volatile__ ("fnclex");
301
302 /* Store the MXCSR register state */
303 __asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
304
305 /* Clear exception flags in MXCSR */
306 mxcsr = envp->__mxcsr;
307 mxcsr &= ~FE_ALL_EXCEPT;
308
309 /* Mask all exceptions */
310 mxcsr |= FE_ALL_EXCEPT << SSE_MASK_SHIFT;
311
312 /* Store the MXCSR register */
313 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
314
315 return (0);
316 }
317
318 /*
319 * The fesetenv() function attempts to establish the floating-point environment
320 * represented by the object pointed to by envp. The argument `envp' points
321 * to an object set by a call to fegetenv() or feholdexcept(), or equal a
322 * floating-point environment macro. The fesetenv() function does not raise
323 * floating-point exceptions, but only installs the state of the floating-point
324 * status flags represented through its argument.
325 */
326 int
fesetenv(const fenv_t * envp)327 fesetenv(const fenv_t *envp)
328 {
329 /* Load the x87 floating-point environent */
330 __asm__ __volatile__ ("fldenv %0" : : "m" (*envp));
331
332 /* Store the MXCSR register */
333 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (envp->__mxcsr));
334
335 return (0);
336 }
337
338 /*
339 * The feupdateenv() function saves the currently raised floating-point
340 * exceptions in its automatic storage, installs the floating-point environment
341 * represented by the object pointed to by `envp', and then raises the saved
342 * floating-point exceptions. The argument `envp' shall point to an object set
343 * by a call to feholdexcept() or fegetenv(), or equal a floating-point
344 * environment macro.
345 */
346 int
feupdateenv(const fenv_t * envp)347 feupdateenv(const fenv_t *envp)
348 {
349 unsigned short status;
350 unsigned int mxcsr;
351
352 /* Store the x87 status register */
353 __asm__ __volatile__ ("fnstsw %0" : "=am" (status));
354
355 /* Store the MXCSR register */
356 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
357
358 /* Install new floating-point environment */
359 fesetenv(envp);
360
361 /* Raise any previously accumulated exceptions */
362 feraiseexcept(status | mxcsr);
363
364 return (0);
365 }
366
367 /*
368 * The following functions are extentions to the standard
369 */
370 int
feenableexcept(int mask)371 feenableexcept(int mask)
372 {
373 unsigned int mxcsr, omask;
374 unsigned short control;
375
376 mask &= FE_ALL_EXCEPT;
377
378 __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
379 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
380
381 omask = ~(control | (mxcsr >> SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
382 control &= ~mask;
383 __asm__ __volatile__ ("fldcw %0" : : "m" (control));
384
385 mxcsr &= ~(mask << SSE_MASK_SHIFT);
386 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
387
388 return (omask);
389 }
390
391 int
fedisableexcept(int mask)392 fedisableexcept(int mask)
393 {
394 unsigned int mxcsr, omask;
395 unsigned short control;
396
397 mask &= FE_ALL_EXCEPT;
398
399 __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
400 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
401
402 omask = ~(control | (mxcsr >> SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
403 control |= mask;
404 __asm__ __volatile__ ("fldcw %0" : : "m" (control));
405
406 mxcsr |= mask << SSE_MASK_SHIFT;
407 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
408
409 return (omask);
410 }
411
412 int
fegetexcept(void)413 fegetexcept(void)
414 {
415 unsigned short control;
416
417 /*
418 * We assume that the masks for the x87 and the SSE unit are
419 * the same.
420 */
421 __asm__ __volatile__ ("fnstcw %0" : "=m" (control));
422
423 return (~control & FE_ALL_EXCEPT);
424 }
425