1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 * ihevcd_process_slice.c
22 *
23 * @brief
24 * Contains functions for processing slice data
25 *
26 * @author
27 * Harish
28 *
29 * @par List of Functions:
30 *
31 * @remarks
32 * None
33 *
34 *******************************************************************************
35 */
36 /*****************************************************************************/
37 /* File Includes */
38 /*****************************************************************************/
39 #include <stdio.h>
40 #include <stddef.h>
41 #include <stdlib.h>
42 #include <string.h>
43 #include <assert.h>
44
45 #include "ihevc_typedefs.h"
46 #include "iv.h"
47 #include "ivd.h"
48 #include "ihevcd_cxa.h"
49 #include "ithread.h"
50
51 #include "ihevc_defs.h"
52 #include "ihevc_debug.h"
53 #include "ihevc_defs.h"
54 #include "ihevc_structs.h"
55 #include "ihevc_macros.h"
56 #include "ihevc_platform_macros.h"
57 #include "ihevc_cabac_tables.h"
58 #include "ihevc_padding.h"
59 #include "ihevc_iquant_itrans_recon.h"
60 #include "ihevc_chroma_iquant_itrans_recon.h"
61 #include "ihevc_recon.h"
62 #include "ihevc_chroma_recon.h"
63 #include "ihevc_iquant_recon.h"
64 #include "ihevc_chroma_iquant_recon.h"
65 #include "ihevc_intra_pred.h"
66
67 #include "ihevc_error.h"
68 #include "ihevc_common_tables.h"
69 #include "ihevc_quant_tables.h"
70 #include "ihevcd_common_tables.h"
71
72 #include "ihevcd_profile.h"
73 #include "ihevcd_trace.h"
74 #include "ihevcd_defs.h"
75 #include "ihevcd_function_selector.h"
76 #include "ihevcd_structs.h"
77 #include "ihevcd_error.h"
78 #include "ihevcd_nal.h"
79 #include "ihevcd_bitstream.h"
80 #include "ihevcd_job_queue.h"
81 #include "ihevcd_utils.h"
82 #include "ihevcd_debug.h"
83 #include "ihevcd_get_mv.h"
84 #include "ihevcd_inter_pred.h"
85 #include "ihevcd_iquant_itrans_recon_ctb.h"
86 #include "ihevcd_boundary_strength.h"
87 #include "ihevcd_deblk.h"
88 #include "ihevcd_fmt_conv.h"
89 #include "ihevcd_sao.h"
90 #include "ihevcd_profile.h"
91
92 IHEVCD_ERROR_T ihevcd_fmt_conv(codec_t *ps_codec,
93 process_ctxt_t *ps_proc,
94 UWORD8 *pu1_y_dst,
95 UWORD8 *pu1_u_dst,
96 UWORD8 *pu1_v_dst,
97 WORD32 cur_row,
98 WORD32 num_rows);
99
100 typedef enum
101 {
102 PROC_ALL,
103 PROC_INTER_PRED,
104 PROC_RECON,
105 PROC_DEBLK,
106 PROC_SAO
107 }proc_type_t;
108
ihevcd_proc_map_check(process_ctxt_t * ps_proc,proc_type_t proc_type,WORD32 nctb)109 void ihevcd_proc_map_check(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb)
110 {
111 tile_t *ps_tile = ps_proc->ps_tile;
112 sps_t *ps_sps = ps_proc->ps_sps;
113 pps_t *ps_pps = ps_proc->ps_pps;
114 codec_t *ps_codec = ps_proc->ps_codec;
115 WORD32 idx;
116 WORD32 nop_cnt;
117 WORD32 bit_pos = proc_type;
118 WORD32 bit_mask = (1 << bit_pos);
119
120 if(ps_proc->i4_check_proc_status)
121 {
122 nop_cnt = PROC_NOP_CNT;
123 while(1)
124 {
125 volatile UWORD8 *pu1_buf;
126 volatile WORD32 status;
127 status = 1;
128 /* Check if all dependencies for the next nCTBs are met */
129 {
130 WORD32 x_pos;
131
132 {
133 /* Check if the top right of next nCTBs are processed */
134 if(ps_proc->i4_ctb_y > 0)
135 {
136 x_pos = (ps_proc->i4_ctb_tile_x + nctb);
137 idx = MIN(x_pos, (ps_tile->u2_wd - 1));
138
139 /* Check if top-right CTB for the last CTB in nCTB is within the tile */
140 {
141 idx += ps_tile->u1_pos_x;
142 idx += ((ps_proc->i4_ctb_y - 1)
143 * ps_sps->i2_pic_wd_in_ctb);
144 pu1_buf = (ps_codec->pu1_proc_map + idx);
145 status = *pu1_buf & bit_mask;
146 }
147 }
148 }
149
150 /* If tiles are enabled, then test left and top-left as well */
151 ps_pps = ps_proc->ps_pps;
152 if(ps_pps->i1_tiles_enabled_flag)
153 {
154 /*Check if left ctb is processed*/
155 if((ps_proc->i4_ctb_x > 0) && ((0 != status)))
156 {
157 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1;
158 idx = x_pos + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb);
159 pu1_buf = (ps_codec->pu1_proc_map + idx);
160 status = *pu1_buf & bit_mask;
161 }
162
163 /*Check if top left ctb is processed*/
164 if((ps_proc->i4_ctb_x > 0) && (0 != status) && (ps_proc->i4_ctb_y > 0))
165 {
166 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1;
167 idx = x_pos + ((ps_proc->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb);
168 pu1_buf = (ps_codec->pu1_proc_map + idx);
169 status = *pu1_buf & bit_mask;
170 }
171 }
172 }
173
174 if(status)
175 break;
176
177 /* if dependencies are not met, then wait for few cycles.
178 * Even after few iterations, if the dependencies are not met then yield
179 */
180 if(nop_cnt > 0)
181 {
182 NOP(128);
183 nop_cnt -= 128;
184 }
185 else
186 {
187 nop_cnt = PROC_NOP_CNT;
188 ithread_yield();
189 //NOP(128 * 16);
190 }
191 }
192 DATA_SYNC();
193 }
194 }
195
ihevcd_proc_map_update(process_ctxt_t * ps_proc,proc_type_t proc_type,WORD32 nctb)196 void ihevcd_proc_map_update(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb)
197 {
198 codec_t *ps_codec = ps_proc->ps_codec;
199 WORD32 i, idx;
200 WORD32 bit_pos = proc_type;
201 WORD32 bit_mask = (1 << bit_pos);
202
203 /* Update the current CTBs processing status */
204 if(ps_proc->i4_check_proc_status)
205 {
206 DATA_SYNC();
207 for(i = 0; i < nctb; i++)
208 {
209 sps_t *ps_sps = ps_proc->ps_sps;
210 UWORD8 *pu1_buf;
211 idx = (ps_proc->i4_ctb_x + i);
212 idx += ((ps_proc->i4_ctb_y) * ps_sps->i2_pic_wd_in_ctb);
213 pu1_buf = (ps_codec->pu1_proc_map + idx);
214 *pu1_buf = *pu1_buf | bit_mask;
215 }
216 }
217 }
218
219
ihevcd_slice_hdr_update(process_ctxt_t * ps_proc)220 void ihevcd_slice_hdr_update(process_ctxt_t *ps_proc)
221 {
222
223 /* Slice x and y are initialized in proc_init. But initialize slice x and y count here
224 * if a new slice begins at the middle of a row since proc_init is invoked only at the beginning of each row */
225 if(!((ps_proc->i4_ctb_x == 0) && (ps_proc->i4_ctb_y == 0)))
226 {
227 slice_header_t *ps_slice_hdr_next = ps_proc->ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx + 1) & (MAX_SLICE_HDR_CNT - 1));
228
229 if((ps_slice_hdr_next->i2_ctb_x == ps_proc->i4_ctb_x)
230 && (ps_slice_hdr_next->i2_ctb_y == ps_proc->i4_ctb_y))
231 {
232 if(0 == ps_slice_hdr_next->i1_dependent_slice_flag)
233 {
234 ps_proc->i4_ctb_slice_x = 0;
235 ps_proc->i4_ctb_slice_y = 0;
236 }
237
238 ps_proc->i4_cur_slice_idx++;
239 ps_proc->ps_slice_hdr = ps_slice_hdr_next;
240 }
241
242 }
243 }
244
ihevcd_ctb_pos_update(process_ctxt_t * ps_proc,WORD32 nctb)245 void ihevcd_ctb_pos_update(process_ctxt_t *ps_proc, WORD32 nctb)
246 {
247 WORD32 tile_start_ctb_idx, slice_start_ctb_idx;
248 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr;
249 tile_t *ps_tile = ps_proc->ps_tile;
250 sps_t *ps_sps = ps_proc->ps_sps;
251
252 /* Update x and y positions */
253 ps_proc->i4_ctb_tile_x += nctb;
254 ps_proc->i4_ctb_x += nctb;
255
256 ps_proc->i4_ctb_slice_x += nctb;
257 /*If tile are enabled, then handle the tile & slice counters differently*/
258 if(ps_proc->ps_pps->i1_tiles_enabled_flag)
259 {
260 /* Update slice counters*/
261 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
262 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
263 /*
264 * There can be 2 cases where slice counters must be handled differently.
265 * 1 - Multiple tiles span across a single/one of the many slice.
266 * 2 - Multiple slices span across a single/one of the many tiles.
267 */
268
269 /*Case 1 */
270 if(slice_start_ctb_idx < tile_start_ctb_idx)
271 {
272 /*End of tile row*/
273 if(ps_proc->i4_ctb_x > ps_slice_hdr->i2_ctb_x)
274 {
275 if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd + ps_tile->u1_pos_x))
276 {
277 ps_proc->i4_ctb_slice_y++;
278 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
279 - ps_tile->u2_wd;
280 }
281 }
282 else
283 {
284 WORD32 temp_stride = (ps_sps->i2_pic_wd_in_ctb - ps_slice_hdr->i2_ctb_x);
285 if(ps_proc->i4_ctb_slice_x >= (temp_stride + ps_tile->u2_wd + ps_tile->u1_pos_x))
286 {
287 ps_proc->i4_ctb_slice_y++;
288 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
289 - ps_tile->u2_wd;
290 }
291 }
292 }
293 /*Case 2*/
294 else if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd))
295 {
296 /*End of tile row*/
297 ps_proc->i4_ctb_slice_y++;
298 ps_proc->i4_ctb_slice_x = 0;
299 }
300 }
301 else
302 {
303 if(ps_proc->i4_ctb_slice_x >= ps_tile->u2_wd)
304 {
305 ps_proc->i4_ctb_slice_y++;
306 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
307 - ps_tile->u2_wd;
308 }
309 }
310 }
311
ihevcd_ctb_avail_update(process_ctxt_t * ps_proc)312 void ihevcd_ctb_avail_update(process_ctxt_t *ps_proc)
313 {
314 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr;
315 sps_t *ps_sps = ps_proc->ps_sps;
316 tile_t *ps_tile_prev;
317 tile_t *ps_tile = ps_proc->ps_tile;
318 WORD32 cur_pu_idx;
319 WORD32 tile_start_ctb_idx, slice_start_ctb_idx;
320 WORD16 i2_wd_in_ctb;
321 WORD32 continuous_tiles = 0;
322 WORD32 cur_ctb_idx;
323 WORD32 check_tile_wd;
324
325 if((0 != ps_tile->u1_pos_x) && (0 != ps_tile->u1_pos_y))
326 {
327 ps_tile_prev = ps_tile - 1;
328 }
329 else
330 {
331 ps_tile_prev = ps_tile;
332 }
333
334
335 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd;
336 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x))
337 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x))))
338 {
339 continuous_tiles = 1;
340 }
341
342 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
343 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
344
345 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles))
346 {
347 //Slices span across multiple tiles.
348 i2_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb;
349 }
350 else
351 {
352 i2_wd_in_ctb = ps_tile->u2_wd;
353 }
354 cur_ctb_idx = ps_proc->i4_ctb_x
355 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
356
357 /* Ctb level availability */
358 /* Bottom left will not be available at a CTB level, no need to pass this */
359 ps_proc->u1_top_ctb_avail = 1;
360 ps_proc->u1_left_ctb_avail = 1;
361 ps_proc->u1_top_lt_ctb_avail = 1;
362 ps_proc->u1_top_rt_ctb_avail = 1;
363 /* slice and tile boundaries */
364
365 if((0 == ps_proc->i4_ctb_y) || (0 == ps_proc->i4_ctb_tile_y))
366 {
367 ps_proc->u1_top_ctb_avail = 0;
368 ps_proc->u1_top_lt_ctb_avail = 0;
369 ps_proc->u1_top_rt_ctb_avail = 0;
370 }
371
372 if((0 == ps_proc->i4_ctb_x) || (0 == ps_proc->i4_ctb_tile_x))
373 {
374 ps_proc->u1_left_ctb_avail = 0;
375 ps_proc->u1_top_lt_ctb_avail = 0;
376 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y))
377 {
378 ps_proc->u1_top_ctb_avail = 0;
379 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x)
380 {
381 ps_proc->u1_top_rt_ctb_avail = 0;
382 }
383 }
384 }
385 /*For slices not beginning at start of a ctb row*/
386 else if(ps_proc->i4_ctb_x > 0)
387 {
388 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y))
389 {
390 ps_proc->u1_top_ctb_avail = 0;
391 ps_proc->u1_top_lt_ctb_avail = 0;
392 if(0 == ps_proc->i4_ctb_slice_x)
393 {
394 ps_proc->u1_left_ctb_avail = 0;
395 }
396 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x)
397 {
398 ps_proc->u1_top_rt_ctb_avail = 0;
399 }
400 }
401 else if((1 == ps_proc->i4_ctb_slice_y) && (0 == ps_proc->i4_ctb_slice_x))
402 {
403 ps_proc->u1_top_lt_ctb_avail = 0;
404 }
405 }
406
407 if((ps_proc->i4_ctb_x == (ps_sps->i2_pic_wd_in_ctb - 1)) || ((ps_tile->u2_wd - 1) == ps_proc->i4_ctb_tile_x))
408 {
409 ps_proc->u1_top_rt_ctb_avail = 0;
410 }
411
412
413 {
414 WORD32 next_ctb_idx;
415 next_ctb_idx = cur_ctb_idx + 1;
416
417 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
418 {
419 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
420 {
421 //Last tile
422 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
423 {
424 next_ctb_idx = cur_ctb_idx + 1;
425 }
426 else //Not last tile, but new tile
427 {
428 tile_t *ps_tile_next = ps_proc->ps_tile + 1;
429 next_ctb_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
430 }
431 }
432 else //End of each tile row
433 {
434 next_ctb_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
435 }
436 }
437 ps_proc->i4_next_pu_ctb_cnt = next_ctb_idx;
438 ps_proc->i4_ctb_pu_cnt =
439 ps_proc->pu4_pic_pu_idx[next_ctb_idx]
440 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
441 cur_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
442 ps_proc->i4_ctb_start_pu_idx = cur_pu_idx;
443 ps_proc->ps_pu = &ps_proc->ps_pic_pu[cur_pu_idx];
444 }
445 }
446
ihevcd_update_ctb_tu_cnt(process_ctxt_t * ps_proc)447 void ihevcd_update_ctb_tu_cnt(process_ctxt_t *ps_proc)
448 {
449 sps_t *ps_sps = ps_proc->ps_sps;
450 codec_t *ps_codec = ps_proc->ps_codec;
451 WORD32 cur_ctb_idx;
452
453 cur_ctb_idx = ps_proc->i4_ctb_x
454 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
455
456 {
457 tile_t *ps_tile;
458 WORD32 next_ctb_tu_idx;
459 ps_tile = ps_proc->ps_tile;
460
461
462 if(1 == ps_codec->i4_num_cores)
463 {
464 next_ctb_tu_idx = cur_ctb_idx % RESET_TU_BUF_NCTB + 1;
465 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
466 {
467 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
468 {
469 //Last tile
470 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
471 {
472 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1;
473 }
474 else //Not last tile, but new tile
475 {
476 tile_t *ps_tile_next = ps_proc->ps_tile + 1;
477 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
478 }
479 }
480 else //End of each tile row
481 {
482 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
483 }
484 }
485 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx;
486 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - ps_proc->pu4_pic_tu_idx[cur_ctb_idx % RESET_TU_BUF_NCTB];
487 }
488 else
489 {
490 next_ctb_tu_idx = cur_ctb_idx + 1;
491 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
492 {
493 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
494 {
495 //Last tile
496 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
497 {
498 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1;
499 }
500 else //Not last tile, but new tile
501 {
502 tile_t *ps_tile_next = ps_proc->ps_tile + 1;
503 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
504 }
505 }
506 else //End of each tile row
507 {
508 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
509 }
510 }
511 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx;
512 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] -
513 ps_proc->pu4_pic_tu_idx[cur_ctb_idx];
514 }
515 }
516 }
517
ihevcd_process(process_ctxt_t * ps_proc)518 IHEVCD_ERROR_T ihevcd_process(process_ctxt_t *ps_proc)
519 {
520 IHEVCD_ERROR_T ret = (IHEVCD_ERROR_T)IHEVCD_SUCCESS;
521 codec_t *ps_codec;
522 sps_t *ps_sps = ps_proc->ps_sps;
523
524 WORD32 nctb;
525 WORD32 i;
526 WORD32 idx;
527 WORD32 nop_cnt;
528 WORD32 num_minpu_in_ctb;
529 WORD32 cur_slice_idx, cur_ctb_tile_x, cur_ctb_slice_x, cur_ctb_tile_y, cur_ctb_slice_y;
530 WORD32 nxt_ctb_slice_y, nxt_ctb_slice_x;
531 tu_t *ps_tu_cur, *ps_tu_nxt;
532 UWORD8 *pu1_pu_map_cur, *pu1_pu_map_nxt;
533 WORD32 num_ctb, num_ctb_tmp;
534 proc_type_t proc_type;
535
536
537 WORD32 ctb_size = 1 << ps_sps->i1_log2_ctb_size;
538
539 PROFILE_DISABLE_PROCESS_CTB();
540
541 ps_codec = ps_proc->ps_codec;
542 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
543
544 nctb = MIN(ps_codec->i4_proc_nctb, ps_proc->i4_ctb_cnt);
545 nctb = MIN(nctb, (ps_proc->ps_tile->u2_wd - ps_proc->i4_ctb_tile_x));
546
547 if(ps_proc->i4_cur_slice_idx > (MAX_SLICE_HDR_CNT - 2 * ps_sps->i2_pic_wd_in_ctb))
548 {
549 num_ctb = 1;
550 }
551 else
552 {
553 num_ctb = ps_proc->i4_nctb;
554 }
555 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y;
556 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x;
557 pu1_pu_map_nxt = ps_proc->pu1_pu_map;
558 ps_tu_nxt = ps_proc->ps_tu;
559
560 while(ps_proc->i4_ctb_cnt)
561 {
562 ps_proc->i4_ctb_slice_y = nxt_ctb_slice_y;
563 ps_proc->i4_ctb_slice_x = nxt_ctb_slice_x;
564 ps_proc->pu1_pu_map = pu1_pu_map_nxt;
565 ps_proc->ps_tu = ps_tu_nxt;
566
567 cur_ctb_tile_x = ps_proc->i4_ctb_tile_x;
568 cur_ctb_tile_y = ps_proc->i4_ctb_tile_y;
569 cur_ctb_slice_x = ps_proc->i4_ctb_slice_x;
570 cur_ctb_slice_y = ps_proc->i4_ctb_slice_y;
571 cur_slice_idx = ps_proc->i4_cur_slice_idx;
572 ps_tu_cur = ps_proc->ps_tu;
573 pu1_pu_map_cur = ps_proc->pu1_pu_map;
574 proc_type = PROC_INTER_PRED;
575
576 if(ps_proc->i4_ctb_cnt < num_ctb)
577 {
578 num_ctb = ps_proc->i4_ctb_cnt;
579 }
580 num_ctb_tmp = num_ctb;
581
582 while(num_ctb_tmp)
583 {
584 slice_header_t *ps_slice_hdr;
585 tile_t *ps_tile = ps_proc->ps_tile;
586
587 /* Waiting for Parsing to be done*/
588 {
589
590
591 nop_cnt = PROC_NOP_CNT;
592 if(ps_proc->i4_check_parse_status || ps_proc->i4_check_proc_status)
593 {
594 while(1)
595 {
596 volatile UWORD8 *pu1_buf;
597 volatile WORD32 status;
598 status = 1;
599 /* Check if all dependencies for the next nCTBs are met */
600 /* Check if the next nCTBs are parsed */
601 if(ps_proc->i4_check_parse_status)
602 {
603 idx = (ps_proc->i4_ctb_x + nctb - 1);
604 idx += (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb);
605 pu1_buf = (ps_codec->pu1_parse_map + idx);
606 status = *pu1_buf;
607 }
608
609 if(status)
610 break;
611
612 /* if dependencies are not met, then wait for few cycles.
613 * Even after few iterations, if the dependencies are not met then yield
614 */
615 if(nop_cnt > 0)
616 {
617 NOP(128);
618 nop_cnt -= 128;
619 }
620 else
621 {
622 nop_cnt = PROC_NOP_CNT;
623 ithread_yield();
624 }
625 }
626 }
627 }
628
629 /* Check proc map to ensure dependencies for recon are met */
630 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
631
632 ihevcd_slice_hdr_update(ps_proc);
633 ps_slice_hdr = ps_proc->ps_slice_hdr;
634
635 //ihevcd_mv_prediction();
636 //ihevcd_lvl_unpack();
637 //ihevcd_inter_iq_it_recon();
638 //Following does prediction, iq, it and recon on a TU by TU basis for intra TUs
639 //ihevcd_intra_process();
640 //ihevcd_ctb_boundary_strength_islice(ps_proc, ctb_size);
641 //ihevcd_deblk_ctb(ps_proc);
642
643 /* iq,it recon of Intra TU */
644 {
645 UWORD32 *pu4_ctb_top_pu_idx, *pu4_ctb_left_pu_idx, *pu4_ctb_top_left_pu_idx;
646 WORD32 cur_ctb_idx;
647
648 ihevcd_ctb_avail_update(ps_proc);
649
650 #if DEBUG_DUMP_FRAME_BUFFERS_INFO
651 au1_pic_avail_ctb_flags[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] =
652 ((ps_proc->u1_top_ctb_avail << 3) | (ps_proc->u1_left_ctb_avail << 2) | (ps_proc->u1_top_lt_ctb_avail << 1) | (ps_proc->u1_top_rt_ctb_avail));
653 au4_pic_ctb_slice_xy[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] =
654 (((UWORD16)ps_proc->i4_ctb_slice_x << 16) | ((UWORD16)ps_proc->i4_ctb_slice_y << 16));
655 #endif
656
657 /*************************************************/
658 /**************** MV pred **********************/
659 /*************************************************/
660 if(PSLICE == ps_slice_hdr->i1_slice_type
661 || BSLICE == ps_slice_hdr->i1_slice_type)
662 {
663 mv_ctxt_t s_mv_ctxt;
664
665 pu4_ctb_top_pu_idx = ps_proc->pu4_pic_pu_idx_top
666 + (ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE);
667 pu4_ctb_left_pu_idx = ps_proc->pu4_pic_pu_idx_left;
668 pu4_ctb_top_left_pu_idx = &ps_proc->u4_ctb_top_left_pu_idx;
669
670 /* Initializing s_mv_ctxt */
671 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
672 {
673 s_mv_ctxt.ps_pps = ps_proc->ps_pps;
674 s_mv_ctxt.ps_sps = ps_proc->ps_sps;
675 s_mv_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
676 s_mv_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
677 s_mv_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
678 s_mv_ctxt.ps_pu = ps_proc->ps_pu;
679 s_mv_ctxt.ps_pic_pu = ps_proc->ps_pic_pu;
680 s_mv_ctxt.ps_tile = ps_tile;
681 s_mv_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map;
682 s_mv_ctxt.pu4_pic_pu_idx = ps_proc->pu4_pic_pu_idx;
683 s_mv_ctxt.pu1_pic_pu_map = ps_proc->pu1_pic_pu_map;
684 s_mv_ctxt.i4_ctb_pu_cnt = ps_proc->i4_ctb_pu_cnt;
685 s_mv_ctxt.i4_ctb_start_pu_idx = ps_proc->i4_ctb_start_pu_idx;
686 s_mv_ctxt.u1_top_ctb_avail = ps_proc->u1_top_ctb_avail;
687 s_mv_ctxt.u1_top_rt_ctb_avail = ps_proc->u1_top_rt_ctb_avail;
688 s_mv_ctxt.u1_top_lt_ctb_avail = ps_proc->u1_top_lt_ctb_avail;
689 s_mv_ctxt.u1_left_ctb_avail = ps_proc->u1_left_ctb_avail;
690
691 ihevcd_get_mv_ctb(&s_mv_ctxt, pu4_ctb_top_pu_idx,
692 pu4_ctb_left_pu_idx, pu4_ctb_top_left_pu_idx);
693 }
694
695 ihevcd_inter_pred_ctb(ps_proc);
696 }
697 else if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
698 {
699 WORD32 next_ctb_idx, num_pu_per_ctb, ctb_start_pu_idx, pu_cnt;
700 pu_t *ps_pu;
701 WORD32 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
702 UWORD8 *pu1_pic_pu_map_ctb = ps_proc->pu1_pic_pu_map +
703 (ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb) * num_minpu_in_ctb;
704 WORD32 row, col;
705 UWORD32 *pu4_nbr_pu_idx = ps_proc->pu4_pic_pu_idx_map;
706 WORD32 nbr_pu_idx_strd = MAX_CTB_SIZE / MIN_PU_SIZE + 2;
707
708 for(row = 0; row < ctb_size / MIN_PU_SIZE; row++)
709 {
710 for(col = 0; col < ctb_size / MIN_PU_SIZE; col++)
711 {
712 pu1_pic_pu_map_ctb[row * ctb_size / MIN_PU_SIZE + col] = 0;
713 }
714 }
715 /* Neighbor PU idx update inside CTB */
716 /* 1byte per 4x4. Indicates the PU idx that 4x4 block belongs to */
717
718 cur_ctb_idx = ps_proc->i4_ctb_x
719 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
720 next_ctb_idx = ps_proc->i4_next_pu_ctb_cnt;
721 num_pu_per_ctb = ps_proc->pu4_pic_pu_idx[next_ctb_idx]
722 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
723 ctb_start_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
724 ps_pu = &ps_proc->ps_pic_pu[ctb_start_pu_idx];
725
726 for(pu_cnt = 0; pu_cnt < num_pu_per_ctb; pu_cnt++, ps_pu++)
727 {
728 UWORD32 cur_pu_idx;
729 WORD32 pu_ht = (ps_pu->b4_ht + 1) << 2;
730 WORD32 pu_wd = (ps_pu->b4_wd + 1) << 2;
731
732 cur_pu_idx = ctb_start_pu_idx + pu_cnt;
733
734 for(row = 0; row < pu_ht / MIN_PU_SIZE; row++)
735 for(col = 0; col < pu_wd / MIN_PU_SIZE; col++)
736 pu4_nbr_pu_idx[(1 + ps_pu->b4_pos_x + col)
737 + (1 + ps_pu->b4_pos_y + row)
738 * nbr_pu_idx_strd] =
739 cur_pu_idx;
740 }
741
742 /* Updating Top and Left pointers */
743 {
744 WORD32 rows_remaining = ps_sps->i2_pic_height_in_luma_samples
745 - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size);
746 WORD32 ctb_size_left = MIN(ctb_size, rows_remaining);
747
748 /* Top Left */
749 /* saving top left before updating top ptr, as updating top ptr will overwrite the top left for the next ctb */
750 ps_proc->u4_ctb_top_left_pu_idx = ps_proc->pu4_pic_pu_idx_top[((ps_proc->i4_ctb_x + 1) * ctb_size / MIN_PU_SIZE) - 1];
751 for(i = 0; i < ctb_size / MIN_PU_SIZE; i++)
752 {
753 /* Left */
754 /* Last column of au4_nbr_pu_idx */
755 ps_proc->pu4_pic_pu_idx_left[i] =
756 pu4_nbr_pu_idx[(ctb_size / MIN_PU_SIZE) + (i + 1) * nbr_pu_idx_strd];
757 /* Top */
758 /* Last row of au4_nbr_pu_idx */
759 ps_proc->pu4_pic_pu_idx_top[(ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE) + i] =
760 pu4_nbr_pu_idx[(ctb_size_left / MIN_PU_SIZE) * nbr_pu_idx_strd + i + 1];
761
762 }
763 }
764 }
765 }
766
767 if(ps_proc->ps_pps->i1_tiles_enabled_flag)
768 {
769 /*Update the tile index buffer with tile information for the current ctb*/
770 UWORD16 *pu1_tile_idx = ps_proc->pu1_tile_idx;
771 pu1_tile_idx[(ps_proc->i4_ctb_x + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb))]
772 = ps_proc->i4_cur_tile_idx;
773 }
774
775 /*************************************************/
776 /*********** BS, QP and Deblocking **************/
777 /*************************************************/
778 /* Boundary strength call has to be after IQ IT recon since QP population needs ps_proc->i4_qp_const_inc_ctb flag */
779
780 {
781 slice_header_t *ps_slice_hdr;
782 ps_slice_hdr = ps_proc->ps_slice_hdr;
783
784
785 /* Check if deblock is disabled for the current slice or if it is disabled for the current picture
786 * because of disable deblock api
787 */
788 if(0 == ps_codec->i4_disable_deblk_pic)
789 {
790 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
791 {
792 /* Boundary strength calculation is done irrespective of whether deblocking is disabled
793 * in the slice or not, to handle deblocking slice boundaries */
794 if((0 == ps_codec->i4_slice_error))
795 {
796 ihevcd_update_ctb_tu_cnt(ps_proc);
797 ps_proc->s_bs_ctxt.ps_pps = ps_proc->ps_pps;
798 ps_proc->s_bs_ctxt.ps_sps = ps_proc->ps_sps;
799 ps_proc->s_bs_ctxt.ps_codec = ps_proc->ps_codec;
800 ps_proc->s_bs_ctxt.i4_ctb_tu_cnt = ps_proc->i4_ctb_tu_cnt;
801 ps_proc->s_bs_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
802 ps_proc->s_bs_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
803 ps_proc->s_bs_ctxt.i4_ctb_tile_x = ps_proc->i4_ctb_tile_x;
804 ps_proc->s_bs_ctxt.i4_ctb_tile_y = ps_proc->i4_ctb_tile_y;
805 ps_proc->s_bs_ctxt.i4_ctb_slice_x = ps_proc->i4_ctb_slice_x;
806 ps_proc->s_bs_ctxt.i4_ctb_slice_y = ps_proc->i4_ctb_slice_y;
807 ps_proc->s_bs_ctxt.ps_tu = ps_proc->ps_tu;
808 ps_proc->s_bs_ctxt.ps_pu = ps_proc->ps_pu;
809 ps_proc->s_bs_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map;
810 ps_proc->s_bs_ctxt.i4_next_pu_ctb_cnt = ps_proc->i4_next_pu_ctb_cnt;
811 ps_proc->s_bs_ctxt.i4_next_tu_ctb_cnt = ps_proc->i4_next_tu_ctb_cnt;
812 ps_proc->s_bs_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
813 ps_proc->s_bs_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
814 ps_proc->s_bs_ctxt.ps_tile = ps_proc->ps_tile;
815
816 if(ISLICE == ps_slice_hdr->i1_slice_type)
817 {
818 ihevcd_ctb_boundary_strength_islice(&ps_proc->s_bs_ctxt);
819 }
820 else
821 {
822 ihevcd_ctb_boundary_strength_pbslice(&ps_proc->s_bs_ctxt);
823 }
824 }
825
826 /* Boundary strength is set to zero if deblocking is disabled for the current slice */
827 if((0 != ps_slice_hdr->i1_slice_disable_deblocking_filter_flag))
828 {
829 WORD32 bs_strd = (ps_sps->i2_pic_wd_in_ctb + 1) * (ctb_size * ctb_size / 8 / 16);
830
831 UWORD32 *pu4_vert_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_vert_bs +
832 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) +
833 ps_proc->i4_ctb_y * bs_strd);
834 UWORD32 *pu4_horz_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_horz_bs +
835 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) +
836 ps_proc->i4_ctb_y * bs_strd);
837
838 memset(pu4_vert_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2);
839 memset(pu4_horz_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2);
840 }
841 }
842 }
843 }
844
845 /* Per CTB update the following */
846 {
847 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x
848 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
849 cur_ctb_idx++;
850
851 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb;
852 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt;
853 if((1 == ps_codec->i4_num_cores) &&
854 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB))
855 {
856 ps_proc->ps_tu = ps_proc->ps_pic_tu;
857 }
858 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt;
859 }
860
861 /* Update proc map for recon*/
862 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
863
864 num_ctb_tmp -= nctb;
865 ihevcd_ctb_pos_update(ps_proc, nctb);
866
867 }
868
869 if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
870 {
871 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
872 ps_proc->i4_cur_slice_idx = cur_slice_idx;
873 }
874 /* Restore the saved variables */
875 num_ctb_tmp = num_ctb;
876 ps_proc->i4_ctb_x -= num_ctb;
877 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
878 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
879 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
880 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
881 ps_proc->pu1_pu_map = pu1_pu_map_cur;
882 ps_proc->ps_tu = ps_tu_cur;
883 proc_type = PROC_RECON;
884
885 while(num_ctb_tmp)
886 {
887
888 /* Check proc map to ensure dependencies for recon are met */
889 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
890
891 ihevcd_slice_hdr_update(ps_proc);
892
893 {
894
895 ihevcd_ctb_avail_update(ps_proc);
896
897 /*************************************************/
898 /**************** IQ IT RECON *******************/
899 /*************************************************/
900
901 ihevcd_update_ctb_tu_cnt(ps_proc);
902
903 /* When scaling matrix is not to be used(scaling_list_enable_flag is zero in SPS),
904 * default value of 16 has to be used. Since the value is same for all sizes,
905 * same table is used for all cases.
906 */
907 if(0 == ps_sps->i1_scaling_list_enable_flag)
908 {
909 ps_proc->api2_dequant_intra_matrix[0] =
910 (WORD16 *)gi2_flat_scale_mat_32x32;
911 ps_proc->api2_dequant_intra_matrix[1] =
912 (WORD16 *)gi2_flat_scale_mat_32x32;
913 ps_proc->api2_dequant_intra_matrix[2] =
914 (WORD16 *)gi2_flat_scale_mat_32x32;
915 ps_proc->api2_dequant_intra_matrix[3] =
916 (WORD16 *)gi2_flat_scale_mat_32x32;
917
918 ps_proc->api2_dequant_inter_matrix[0] =
919 (WORD16 *)gi2_flat_scale_mat_32x32;
920 ps_proc->api2_dequant_inter_matrix[1] =
921 (WORD16 *)gi2_flat_scale_mat_32x32;
922 ps_proc->api2_dequant_inter_matrix[2] =
923 (WORD16 *)gi2_flat_scale_mat_32x32;
924 ps_proc->api2_dequant_inter_matrix[3] =
925 (WORD16 *)gi2_flat_scale_mat_32x32;
926 }
927 else
928 {
929 if(0 == ps_sps->i1_sps_scaling_list_data_present_flag)
930 {
931 ps_proc->api2_dequant_intra_matrix[0] =
932 (WORD16 *)gi2_flat_scale_mat_32x32;
933 ps_proc->api2_dequant_intra_matrix[1] =
934 (WORD16 *)gi2_intra_default_scale_mat_8x8;
935 ps_proc->api2_dequant_intra_matrix[2] =
936 (WORD16 *)gi2_intra_default_scale_mat_16x16;
937 ps_proc->api2_dequant_intra_matrix[3] =
938 (WORD16 *)gi2_intra_default_scale_mat_32x32;
939
940 ps_proc->api2_dequant_inter_matrix[0] =
941 (WORD16 *)gi2_flat_scale_mat_32x32;
942 ps_proc->api2_dequant_inter_matrix[1] =
943 (WORD16 *)gi2_inter_default_scale_mat_8x8;
944 ps_proc->api2_dequant_inter_matrix[2] =
945 (WORD16 *)gi2_inter_default_scale_mat_16x16;
946 ps_proc->api2_dequant_inter_matrix[3] =
947 (WORD16 *)gi2_inter_default_scale_mat_32x32;
948 }
949 /*TODO: Add support for custom scaling matrices */
950 }
951
952
953 /* CTB Level pointers */
954 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
955 + (ps_proc->i4_ctb_x * ctb_size
956 + ps_proc->i4_ctb_y * ctb_size
957 * ps_codec->i4_strd);
958 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
959 + ps_proc->i4_ctb_x * ctb_size
960 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
961
962 ihevcd_iquant_itrans_recon_ctb(ps_proc);
963 }
964
965 /* Per CTB update the following */
966 {
967 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x
968 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
969 cur_ctb_idx++;
970
971 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb;
972 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt;
973 if((1 == ps_codec->i4_num_cores) &&
974 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB))
975 {
976 ps_proc->ps_tu = ps_proc->ps_pic_tu;
977 }
978 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt;
979 }
980
981
982 /* Update proc map for recon*/
983 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
984
985 num_ctb_tmp -= nctb;
986 ihevcd_ctb_pos_update(ps_proc, nctb);
987 }
988
989 if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
990 {
991 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
992 ps_proc->i4_cur_slice_idx = cur_slice_idx;
993 }
994 /* Restore the saved variables */
995 num_ctb_tmp = num_ctb;
996 ps_proc->i4_ctb_x -= num_ctb;
997 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
998 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
999 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
1000 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
1001 pu1_pu_map_nxt = ps_proc->pu1_pu_map;
1002 ps_tu_nxt = ps_proc->ps_tu;
1003 ps_proc->pu1_pu_map = pu1_pu_map_cur;
1004 ps_proc->ps_tu = ps_tu_cur;
1005 proc_type = PROC_DEBLK;
1006
1007 while(num_ctb_tmp)
1008 {
1009
1010
1011 /* Check proc map to ensure dependencies for deblk are met */
1012 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
1013
1014 ihevcd_slice_hdr_update(ps_proc);
1015
1016
1017 if(((0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)) &&
1018 (0 == ps_codec->i4_disable_deblk_pic))
1019 {
1020 WORD32 i4_is_last_ctb_x = 0;
1021 WORD32 i4_is_last_ctb_y = 0;
1022
1023
1024 /* Deblocking is done irrespective of whether it is disabled in the slice or not,
1025 * to handle deblocking the slice boundaries */
1026 {
1027 ps_proc->s_deblk_ctxt.ps_pps = ps_proc->ps_pps;
1028 ps_proc->s_deblk_ctxt.ps_sps = ps_proc->ps_sps;
1029 ps_proc->s_deblk_ctxt.ps_codec = ps_proc->ps_codec;
1030 ps_proc->s_deblk_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
1031 ps_proc->s_deblk_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1032 ps_proc->s_deblk_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1033 ps_proc->s_deblk_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
1034 ps_proc->s_deblk_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU);
1035
1036 /* Populating Current CTB's no_loop_filter flags */
1037 {
1038 WORD32 row;
1039 WORD32 log2_ctb_size = ps_sps->i1_log2_ctb_size;
1040
1041 /* Loop filter strd in units of num bits */
1042 WORD32 loop_filter_strd = ((ps_sps->i2_pic_width_in_luma_samples + 63) >> 6) << 3;
1043 /* Bit position is the current 8x8 bit offset wrt pic_no_loop_filter
1044 * bit_pos has to be a WOR32 so that when it is negative, the downshift still retains it to be a negative value */
1045 WORD32 bit_pos = ((ps_proc->i4_ctb_y << (log2_ctb_size - 3)) - 1) * loop_filter_strd + (ps_proc->i4_ctb_x << (log2_ctb_size - 3)) - 1;
1046
1047 for(row = 0; row < (ctb_size >> 3) + 1; row++)
1048 {
1049 /* Go to the corresponding byte - read 32 bits and downshift */
1050 ps_proc->s_deblk_ctxt.au2_ctb_no_loop_filter_flag[row] = (*(UWORD32 *)(ps_proc->pu1_pic_no_loop_filter_flag + (bit_pos >> 3))) >> (bit_pos & 7);
1051 bit_pos += loop_filter_strd;
1052 }
1053 }
1054
1055 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1056
1057 /* If the last CTB in the row was a complete CTB then deblocking has to be called from remaining pixels, since deblocking
1058 * is applied on a shifted CTB structure
1059 */
1060 if(ps_proc->i4_ctb_x == ps_sps->i2_pic_wd_in_ctb - 1)
1061 {
1062 WORD32 i4_is_last_ctb_x = 1;
1063 WORD32 i4_is_last_ctb_y = 0;
1064
1065 WORD32 last_x_pos;
1066 last_x_pos = (ps_sps->i2_pic_wd_in_ctb << ps_sps->i1_log2_ctb_size);
1067 if(last_x_pos == ps_sps->i2_pic_width_in_luma_samples)
1068 {
1069 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1070 }
1071 }
1072
1073
1074 /* If the last CTB in the column was a complete CTB then deblocking has to be called from remaining pixels, since deblocking
1075 * is applied on a shifted CTB structure
1076 */
1077 if(ps_proc->i4_ctb_y == ps_sps->i2_pic_ht_in_ctb - 1)
1078 {
1079 WORD32 i4_is_last_ctb_x = 0;
1080 WORD32 i4_is_last_ctb_y = 1;
1081 WORD32 last_y_pos;
1082 last_y_pos = (ps_sps->i2_pic_ht_in_ctb << ps_sps->i1_log2_ctb_size);
1083 if(last_y_pos == ps_sps->i2_pic_height_in_luma_samples)
1084 {
1085 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1086 }
1087 }
1088 }
1089 }
1090
1091 /* Update proc map for deblk*/
1092 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
1093
1094 num_ctb_tmp -= nctb;
1095 ihevcd_ctb_pos_update(ps_proc, nctb);
1096 }
1097
1098 if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
1099 {
1100 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
1101 ps_proc->i4_cur_slice_idx = cur_slice_idx;
1102 }
1103 /* Restore the saved variables */
1104 num_ctb_tmp = num_ctb;
1105 ps_proc->i4_ctb_x -= num_ctb;
1106 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
1107 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
1108 ps_proc->pu1_pu_map = pu1_pu_map_cur;
1109 ps_proc->ps_tu = ps_tu_cur;
1110 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y;
1111 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x;
1112 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
1113 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
1114 proc_type = PROC_SAO;
1115
1116 while(num_ctb_tmp)
1117 {
1118
1119
1120 /* Check proc map to ensure dependencies for SAO are met */
1121 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
1122
1123 ihevcd_slice_hdr_update(ps_proc);
1124
1125
1126 if(0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)
1127 {
1128 /* SAO is done even when it is disabled in the current slice, because
1129 * it is performed on a shifted CTB and the neighbor CTBs can belong
1130 * to different slices with SAO enabled */
1131 if(0 == ps_codec->i4_disable_sao_pic)
1132 {
1133 ps_proc->s_sao_ctxt.ps_pps = ps_proc->ps_pps;
1134 ps_proc->s_sao_ctxt.ps_sps = ps_proc->ps_sps;
1135 ps_proc->s_sao_ctxt.ps_tile = ps_proc->ps_tile;
1136 ps_proc->s_sao_ctxt.ps_codec = ps_proc->ps_codec;
1137 ps_proc->s_sao_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
1138 ps_proc->s_sao_ctxt.i4_cur_slice_idx = ps_proc->i4_cur_slice_idx;
1139
1140
1141 #if SAO_PROCESS_SHIFT_CTB
1142 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1143 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1144 ps_proc->s_sao_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU);
1145
1146 ihevcd_sao_shift_ctb(&ps_proc->s_sao_ctxt);
1147 #else
1148 if(ps_proc->i4_ctb_x > 1 && ps_proc->i4_ctb_y > 0)
1149 {
1150 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 2;
1151 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1152
1153 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1154 }
1155
1156 if(ps_sps->i2_pic_wd_in_ctb - 1 == ps_proc->i4_ctb_x && ps_proc->i4_ctb_y > 0)
1157 {
1158 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 1;
1159 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1160
1161 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1162
1163 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1164 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1165
1166 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1167
1168 if(ps_sps->i2_pic_ht_in_ctb - 1 == ps_proc->i4_ctb_y)
1169 {
1170 WORD32 i4_ctb_x;
1171 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1172 for(i4_ctb_x = 0; i4_ctb_x < ps_sps->i2_pic_wd_in_ctb; i4_ctb_x++)
1173 {
1174 ps_proc->s_sao_ctxt.i4_ctb_x = i4_ctb_x;
1175 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1176 }
1177 }
1178 }
1179 #endif
1180 }
1181
1182
1183 /* Call padding if required */
1184 {
1185 #if SAO_PROCESS_SHIFT_CTB
1186
1187 if(0 == ps_proc->i4_ctb_x)
1188 {
1189 WORD32 pad_ht_luma;
1190 WORD32 pad_ht_chroma;
1191
1192 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
1193 + (ps_proc->i4_ctb_x * ctb_size
1194 + ps_proc->i4_ctb_y * ctb_size
1195 * ps_codec->i4_strd);
1196 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
1197 + ps_proc->i4_ctb_x * ctb_size
1198 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
1199
1200 pad_ht_luma = ctb_size;
1201 pad_ht_luma += (ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y ? 8 : 0;
1202 pad_ht_chroma = ctb_size / 2;
1203 /* Pad left after 1st CTB is processed */
1204 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1205 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1206 }
1207
1208 if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x)
1209 {
1210 WORD32 pad_ht_luma;
1211 WORD32 pad_ht_chroma;
1212 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size);
1213
1214 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
1215 + (ps_proc->i4_ctb_x * ctb_size
1216 + ps_proc->i4_ctb_y * ctb_size
1217 * ps_codec->i4_strd);
1218 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
1219 + ps_proc->i4_ctb_x * ctb_size
1220 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
1221
1222 pad_ht_luma = ctb_size;
1223 pad_ht_chroma = ctb_size / 2;
1224 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1225 {
1226 pad_ht_luma += 8;
1227 pad_ht_chroma += 16;
1228 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + (ps_sps->i2_pic_height_in_luma_samples / 2 - 16) * ps_codec->i4_strd,
1229 ps_codec->i4_strd, 16, PAD_LEFT);
1230 }
1231 /* Pad right after last CTB in the current row is processed */
1232 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT);
1233 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT);
1234
1235 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1236 {
1237 UWORD8 *pu1_buf;
1238 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */
1239 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */
1240 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1241 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP);
1242 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2);
1243
1244 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT;
1245 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1246 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT);
1247
1248 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT;
1249 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2);
1250 }
1251 }
1252 #else
1253 if(ps_proc->i4_ctb_y > 1)
1254 {
1255 if(0 == ps_proc->i4_ctb_x)
1256 {
1257 WORD32 pad_ht_luma;
1258 WORD32 pad_ht_chroma;
1259
1260 pad_ht_luma = ctb_size;
1261 pad_ht_chroma = ctb_size / 2;
1262 /* Pad left after 1st CTB is processed */
1263 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1264 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1265 }
1266 else if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x)
1267 {
1268 WORD32 pad_ht_luma;
1269 WORD32 pad_ht_chroma;
1270 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size);
1271
1272 pad_ht_luma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size : ctb_size;
1273 pad_ht_chroma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size / 2 : ctb_size / 2;
1274 /* Pad right after last CTB in the current row is processed */
1275 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT);
1276 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT);
1277
1278 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1279 {
1280 UWORD8 *pu1_buf;
1281 WORD32 pad_ht_luma;
1282 WORD32 pad_ht_chroma;
1283
1284 pad_ht_luma = 2 * ctb_size;
1285 pad_ht_chroma = ctb_size;
1286
1287 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples - 2 * ctb_size),
1288 ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1289 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2 - ctb_size),
1290 ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1291
1292 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */
1293 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */
1294 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1295 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP);
1296 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2);
1297
1298 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT;
1299 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1300 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT);
1301
1302 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT;
1303 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2);
1304 }
1305 }
1306 }
1307 #endif
1308 }
1309 }
1310
1311
1312 /* Update proc map for SAO*/
1313 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
1314 /* Update proc map for Completion of CTB*/
1315 ihevcd_proc_map_update(ps_proc, PROC_ALL, nctb);
1316 {
1317 tile_t *ps_tile;
1318
1319 ps_tile = ps_proc->ps_tile;
1320 num_ctb_tmp -= nctb;
1321
1322 ps_proc->i4_ctb_tile_x += nctb;
1323 ps_proc->i4_ctb_x += nctb;
1324
1325 ps_proc->i4_ctb_slice_x += nctb;
1326
1327
1328 /* Update tile counters */
1329 if(ps_proc->i4_ctb_tile_x >= (ps_tile->u2_wd))
1330 {
1331 /*End of tile row*/
1332 ps_proc->i4_ctb_tile_x = 0;
1333 ps_proc->i4_ctb_x = ps_tile->u1_pos_x;
1334
1335 ps_proc->i4_ctb_tile_y++;
1336 ps_proc->i4_ctb_y++;
1337 if(ps_proc->i4_ctb_tile_y == ps_tile->u2_ht)
1338 {
1339 /* Reached End of Tile */
1340 ps_proc->i4_ctb_tile_y = 0;
1341 ps_proc->i4_ctb_tile_x = 0;
1342 ps_proc->ps_tile++;
1343 //End of picture
1344 if(!((ps_tile->u2_ht + ps_tile->u1_pos_y == ps_sps->i2_pic_ht_in_ctb) && (ps_tile->u2_wd + ps_tile->u1_pos_x == ps_sps->i2_pic_wd_in_ctb)))
1345 {
1346 ps_tile = ps_proc->ps_tile;
1347 ps_proc->i4_ctb_x = ps_tile->u1_pos_x;
1348 ps_proc->i4_ctb_y = ps_tile->u1_pos_y;
1349
1350 }
1351 }
1352 }
1353 }
1354 }
1355
1356 ps_proc->i4_ctb_cnt -= num_ctb;
1357 }
1358 return ret;
1359 }
1360
ihevcd_init_proc_ctxt(process_ctxt_t * ps_proc,WORD32 tu_coeff_data_ofst)1361 void ihevcd_init_proc_ctxt(process_ctxt_t *ps_proc, WORD32 tu_coeff_data_ofst)
1362 {
1363 codec_t *ps_codec;
1364 slice_header_t *ps_slice_hdr;
1365 pps_t *ps_pps;
1366 sps_t *ps_sps;
1367 tile_t *ps_tile, *ps_tile_prev;
1368 WORD32 tile_idx;
1369 WORD32 ctb_size;
1370 WORD32 num_minpu_in_ctb;
1371 WORD32 num_ctb_in_row;
1372 WORD32 ctb_addr;
1373 WORD32 i4_wd_in_ctb;
1374 WORD32 tile_start_ctb_idx;
1375 WORD32 slice_start_ctb_idx;
1376 WORD32 check_tile_wd;
1377 WORD32 continuous_tiles = 0; //Refers to tiles that are continuous, within a slice, horizontally
1378
1379 ps_codec = ps_proc->ps_codec;
1380
1381 ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx) & (MAX_SLICE_HDR_CNT - 1));
1382 ps_proc->ps_slice_hdr = ps_slice_hdr;
1383 ps_proc->ps_pps = ps_codec->ps_pps_base + ps_slice_hdr->i1_pps_id;
1384 ps_pps = ps_proc->ps_pps;
1385 ps_proc->ps_sps = ps_codec->ps_sps_base + ps_pps->i1_sps_id;
1386 ps_sps = ps_proc->ps_sps;
1387 ps_proc->i4_init_done = 1;
1388 ctb_size = 1 << ps_sps->i1_log2_ctb_size;
1389 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
1390 num_ctb_in_row = ps_sps->i2_pic_wd_in_ctb;
1391
1392 ps_proc->s_sao_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
1393
1394 ihevcd_get_tile_pos(ps_pps, ps_sps, ps_proc->i4_ctb_x, ps_proc->i4_ctb_y,
1395 &ps_proc->i4_ctb_tile_x, &ps_proc->i4_ctb_tile_y,
1396 &tile_idx);
1397
1398 ps_proc->ps_tile = ps_pps->ps_tile + tile_idx;
1399 ps_proc->i4_cur_tile_idx = tile_idx;
1400 ps_tile = ps_proc->ps_tile;
1401
1402 if(ps_pps->i1_tiles_enabled_flag)
1403 {
1404 if(tile_idx)
1405 ps_tile_prev = ps_tile - 1;
1406 else
1407 ps_tile_prev = ps_tile;
1408
1409 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
1410 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
1411
1412 /*Check if
1413 * 1. Last tile that ends in frame boundary and 1st tile in next row belongs to same slice
1414 * 1.1. If it does, check if the slice that has these tiles spans across the frame row.
1415 * 2. Vertical tiles are present within a slice */
1416 if(((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x) && (ps_slice_hdr->i2_ctb_y != ps_tile->u1_pos_y)))
1417 {
1418 continuous_tiles = 1;
1419 }
1420 else
1421 {
1422 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd;
1423 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x))
1424 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x))))
1425 {
1426 continuous_tiles = 1;
1427 }
1428 }
1429
1430 {
1431 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x;
1432 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y;
1433
1434 /* Handles cases where
1435 * 1. Slices begin at the start of each tile
1436 * 2. Tiles lie in the same slice row.i.e, starting tile_x > slice_x, but tile_y == slice_y
1437 * */
1438 if(ps_proc->i4_ctb_x >= i2_independent_ctb_x)
1439 {
1440 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x;
1441 }
1442 else
1443 {
1444 /* Indicates multiple tiles in a slice case where
1445 * The new tile belongs to an older slice that started in the previous rows-not the present row
1446 * & (tile_y > slice_y and tile_x < slice_x)
1447 */
1448 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles))
1449 {
1450 i4_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb;
1451 }
1452 /* Indicates many-tiles-in-one-slice case, for slices that end without spanning the frame width*/
1453 else
1454 {
1455 i4_wd_in_ctb = ps_tile->u2_wd;
1456 }
1457
1458 if(continuous_tiles)
1459 {
1460 ps_proc->i4_ctb_slice_x = i4_wd_in_ctb
1461 - (i2_independent_ctb_x - ps_proc->i4_ctb_x);
1462 }
1463 else
1464 {
1465 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - ps_tile->u1_pos_x;
1466 }
1467 }
1468 /* Initialize ctb slice y to zero and at the start of slice row initialize it
1469 to difference between ctb_y and slice's start ctb y */
1470
1471 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y;
1472
1473 /*If beginning of tile, check if slice counters are set correctly*/
1474 if((0 == ps_proc->i4_ctb_tile_x) && (0 == ps_proc->i4_ctb_tile_y))
1475 {
1476 if(ps_slice_hdr->i1_dependent_slice_flag)
1477 {
1478 ps_proc->i4_ctb_slice_x = 0;
1479 ps_proc->i4_ctb_slice_y = 0;
1480 }
1481 /*For slices that span across multiple tiles*/
1482 else if(slice_start_ctb_idx < tile_start_ctb_idx)
1483 {
1484 ps_proc->i4_ctb_slice_y = ps_tile->u1_pos_y - i2_independent_ctb_y;
1485 /* Two Cases
1486 * 1 - slice spans across frame-width- but dose not start from 1st column
1487 * 2 - Slice spans across multiple tiles anywhere is a frame
1488 */
1489 /*TODO:In a multiple slice clip, if an independent slice span across more than 2 tiles in a row, it is not supported*/
1490 if(continuous_tiles) //Case 2-implemented for slices that span not more than 2 tiles
1491 {
1492 if(i2_independent_ctb_y <= ps_tile->u1_pos_y)
1493 {
1494 //Check if ctb x is before or after
1495 if(i2_independent_ctb_x > ps_tile->u1_pos_x)
1496 {
1497 ps_proc->i4_ctb_slice_y -= 1;
1498 }
1499 }
1500 }
1501 }
1502 }
1503 //Slice starts from a column which is not the starting tile-column, but is within the tile
1504 if(((i2_independent_ctb_x - ps_tile->u1_pos_x) != 0) && ((ps_proc->i4_ctb_slice_y != 0))
1505 && ((i2_independent_ctb_x >= ps_tile->u1_pos_x) && (i2_independent_ctb_x < ps_tile->u1_pos_x + ps_tile->u2_wd)))
1506 {
1507 ps_proc->i4_ctb_slice_y -= 1;
1508 }
1509 }
1510 }
1511 else
1512 {
1513 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x;
1514 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y;
1515
1516
1517 {
1518 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x;
1519 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y;
1520 if(ps_proc->i4_ctb_slice_x < 0)
1521 {
1522 ps_proc->i4_ctb_slice_x += ps_sps->i2_pic_wd_in_ctb;
1523 ps_proc->i4_ctb_slice_y -= 1;
1524 }
1525
1526 /* Initialize ctb slice y to zero and at the start of slice row initialize it
1527 to difference between ctb_y and slice's start ctb y */
1528 }
1529 }
1530
1531 /* Compute TU offset for the current CTB set */
1532 {
1533
1534 WORD32 ctb_luma_min_tu_cnt;
1535 WORD32 ctb_addr;
1536
1537 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x;
1538
1539 ctb_luma_min_tu_cnt = (1 << ps_sps->i1_log2_ctb_size) / MIN_TU_SIZE;
1540 ctb_luma_min_tu_cnt *= ctb_luma_min_tu_cnt;
1541
1542 ps_proc->pu1_tu_map = ps_proc->pu1_pic_tu_map
1543 + ctb_luma_min_tu_cnt * ctb_addr;
1544 if(1 == ps_codec->i4_num_cores)
1545 {
1546 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr % RESET_TU_BUF_NCTB];
1547 }
1548 else
1549 {
1550 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr];
1551 }
1552 ps_proc->pv_tu_coeff_data = (UWORD8 *)ps_proc->pv_pic_tu_coeff_data
1553 + tu_coeff_data_ofst;
1554
1555 }
1556
1557 /* Compute PU related elements for the current CTB set */
1558 {
1559 WORD32 pu_idx;
1560 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x;
1561 pu_idx = ps_proc->pu4_pic_pu_idx[ctb_addr];
1562 ps_proc->pu1_pu_map = ps_proc->pu1_pic_pu_map
1563 + ctb_addr * num_minpu_in_ctb;
1564 ps_proc->ps_pu = ps_proc->ps_pic_pu + pu_idx;
1565 }
1566
1567 /* Number of ctbs processed in one loop of process function */
1568 {
1569 ps_proc->i4_nctb = MIN(ps_codec->u4_nctb, ps_tile->u2_wd);
1570 }
1571
1572 }
ihevcd_process_thread(process_ctxt_t * ps_proc)1573 void ihevcd_process_thread(process_ctxt_t *ps_proc)
1574 {
1575 {
1576 ithread_set_affinity(ps_proc->i4_id + 1);
1577 }
1578 while(1)
1579 {
1580 IHEVCD_ERROR_T ret;
1581 proc_job_t s_job;
1582
1583 ret = ihevcd_jobq_dequeue((jobq_t *)ps_proc->pv_proc_jobq, &s_job,
1584 sizeof(proc_job_t), 1);
1585 if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret)
1586 break;
1587
1588 ps_proc->i4_ctb_cnt = s_job.i2_ctb_cnt;
1589 ps_proc->i4_ctb_x = s_job.i2_ctb_x;
1590 ps_proc->i4_ctb_y = s_job.i2_ctb_y;
1591 ps_proc->i4_cur_slice_idx = s_job.i2_slice_idx;
1592
1593
1594
1595 if(CMD_PROCESS == s_job.i4_cmd)
1596 {
1597 ihevcd_init_proc_ctxt(ps_proc, s_job.i4_tu_coeff_data_ofst);
1598 ihevcd_process(ps_proc);
1599 }
1600 else if(CMD_FMTCONV == s_job.i4_cmd)
1601 {
1602 sps_t *ps_sps;
1603 codec_t *ps_codec;
1604 ivd_out_bufdesc_t *ps_out_buffer;
1605 WORD32 num_rows;
1606
1607 if(0 == ps_proc->i4_init_done)
1608 {
1609 ihevcd_init_proc_ctxt(ps_proc, 0);
1610 }
1611 ps_sps = ps_proc->ps_sps;
1612 ps_codec = ps_proc->ps_codec;
1613 ps_out_buffer = ps_proc->ps_out_buffer;
1614 num_rows = 1 << ps_sps->i1_log2_ctb_size;
1615
1616 num_rows = MIN(num_rows, (ps_codec->i4_disp_ht - (s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size)));
1617
1618 if(num_rows < 0)
1619 num_rows = 0;
1620
1621 ihevcd_fmt_conv(ps_proc->ps_codec, ps_proc, ps_out_buffer->pu1_bufs[0], ps_out_buffer->pu1_bufs[1], ps_out_buffer->pu1_bufs[2],
1622 s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size, num_rows);
1623 }
1624 }
1625 //ithread_exit(0);
1626 return;
1627 }
1628
1629