1 /*
2  * Copyright (C) 2012 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include "disassembler_mips.h"
18 
19 #include <ostream>
20 #include <sstream>
21 
22 #include "android-base/logging.h"
23 #include "android-base/stringprintf.h"
24 
25 #include "base/bit_utils.h"
26 
27 using android::base::StringPrintf;
28 
29 namespace art {
30 namespace mips {
31 
32 struct MipsInstruction {
33   uint32_t mask;
34   uint32_t value;
35   const char* name;
36   const char* args_fmt;
37 
Matchesart::mips::MipsInstruction38   bool Matches(uint32_t instruction) const {
39     return (instruction & mask) == value;
40   }
41 };
42 
43 static const uint32_t kOpcodeShift = 26;
44 
45 static const uint32_t kCop1 = (17 << kOpcodeShift);
46 static const uint32_t kMsa = (30 << kOpcodeShift);  // MSA major opcode.
47 
48 static const uint32_t kITypeMask = (0x3f << kOpcodeShift);
49 static const uint32_t kJTypeMask = (0x3f << kOpcodeShift);
50 static const uint32_t kRTypeMask = ((0x3f << kOpcodeShift) | (0x3f));
51 static const uint32_t kSpecial0Mask = (0x3f << kOpcodeShift);
52 static const uint32_t kSpecial2Mask = (0x3f << kOpcodeShift);
53 static const uint32_t kSpecial3Mask = (0x3f << kOpcodeShift);
54 static const uint32_t kFpMask = kRTypeMask;
55 static const uint32_t kMsaMask = kRTypeMask;
56 static const uint32_t kMsaSpecialMask = (0x3f << kOpcodeShift);
57 
58 static const MipsInstruction gMipsInstructions[] = {
59   // "sll r0, r0, 0" is the canonical "nop", used in delay slots.
60   { 0xffffffff, 0, "nop", "" },
61 
62   // R-type instructions.
63   { kRTypeMask, 0, "sll", "DTA", },
64   // 0, 1, movci
65   { kRTypeMask | (0x1f << 21), 2, "srl", "DTA", },
66   { kRTypeMask, 3, "sra", "DTA", },
67   { kRTypeMask | (0x1f << 6), 4, "sllv", "DTS", },
68   { kRTypeMask | (0x1f << 6), 6, "srlv", "DTS", },
69   { kRTypeMask | (0x1f << 6), (1 << 6) | 6, "rotrv", "DTS", },
70   { kRTypeMask | (0x1f << 6), 7, "srav", "DTS", },
71   { kRTypeMask, 8, "jr", "S", },
72   { kRTypeMask | (0x1f << 11), 9 | (31 << 11), "jalr", "S", },  // rd = 31 is implicit.
73   { kRTypeMask | (0x1f << 11), 9, "jr", "S", },  // rd = 0 is implicit.
74   { kRTypeMask, 9, "jalr", "DS", },  // General case.
75   { kRTypeMask | (0x1f << 6), 10, "movz", "DST", },
76   { kRTypeMask | (0x1f << 6), 11, "movn", "DST", },
77   { kRTypeMask, 12, "syscall", "", },  // TODO: code
78   { kRTypeMask, 13, "break", "", },  // TODO: code
79   { kRTypeMask, 15, "sync", "", },  // TODO: type
80   { kRTypeMask, 16, "mfhi", "D", },
81   { kRTypeMask, 17, "mthi", "S", },
82   { kRTypeMask, 18, "mflo", "D", },
83   { kRTypeMask, 19, "mtlo", "S", },
84   { kRTypeMask | (0x1f << 6), 20, "dsllv", "DTS", },
85   { kRTypeMask | (0x1f << 6), 22, "dsrlv", "DTS", },
86   { kRTypeMask | (0x1f << 6), (1 << 6) | 22, "drotrv", "DTS", },
87   { kRTypeMask | (0x1f << 6), 23, "dsrav", "DTS", },
88   { kRTypeMask | (0x1f << 6), 24, "mult", "ST", },
89   { kRTypeMask | (0x1f << 6), 25, "multu", "ST", },
90   { kRTypeMask | (0x1f << 6), 26, "div", "ST", },
91   { kRTypeMask | (0x1f << 6), 27, "divu", "ST", },
92   { kRTypeMask | (0x1f << 6), 24 + (2 << 6), "mul", "DST", },
93   { kRTypeMask | (0x1f << 6), 24 + (3 << 6), "muh", "DST", },
94   { kRTypeMask | (0x1f << 6), 26 + (2 << 6), "div", "DST", },
95   { kRTypeMask | (0x1f << 6), 26 + (3 << 6), "mod", "DST", },
96   { kRTypeMask, 32, "add", "DST", },
97   { kRTypeMask, 33, "addu", "DST", },
98   { kRTypeMask, 34, "sub", "DST", },
99   { kRTypeMask, 35, "subu", "DST", },
100   { kRTypeMask, 36, "and", "DST", },
101   { kRTypeMask, 37, "or", "DST", },
102   { kRTypeMask, 38, "xor", "DST", },
103   { kRTypeMask, 39, "nor", "DST", },
104   { kRTypeMask, 42, "slt", "DST", },
105   { kRTypeMask, 43, "sltu", "DST", },
106   { kRTypeMask, 45, "daddu", "DST", },
107   { kRTypeMask, 46, "dsub", "DST", },
108   { kRTypeMask, 47, "dsubu", "DST", },
109   // TODO: tge[u], tlt[u], teg, tne
110   { kRTypeMask | (0x1f << 21), 56, "dsll", "DTA", },
111   { kRTypeMask | (0x1f << 21), 58, "dsrl", "DTA", },
112   { kRTypeMask | (0x1f << 21), (1 << 21) | 58, "drotr", "DTA", },
113   { kRTypeMask | (0x1f << 21), 59, "dsra", "DTA", },
114   { kRTypeMask | (0x1f << 21), 60, "dsll32", "DTA", },
115   { kRTypeMask | (0x1f << 21), 62, "dsrl32", "DTA", },
116   { kRTypeMask | (0x1f << 21), (1 << 21) | 62, "drotr32", "DTA", },
117   { kRTypeMask | (0x1f << 21), 63, "dsra32", "DTA", },
118 
119   // SPECIAL0
120   { kSpecial0Mask | 0x307ff, 1, "movf", "DSc" },
121   { kSpecial0Mask | 0x307ff, 0x10001, "movt", "DSc" },
122   { kSpecial0Mask | 0x7ff, (2 << 6) | 24, "mul", "DST" },
123   { kSpecial0Mask | 0x7ff, (3 << 6) | 24, "muh", "DST" },
124   { kSpecial0Mask | 0x7ff, (2 << 6) | 25, "mulu", "DST" },
125   { kSpecial0Mask | 0x7ff, (3 << 6) | 25, "muhu", "DST" },
126   { kSpecial0Mask | 0x7ff, (2 << 6) | 26, "div", "DST" },
127   { kSpecial0Mask | 0x7ff, (3 << 6) | 26, "mod", "DST" },
128   { kSpecial0Mask | 0x7ff, (2 << 6) | 27, "divu", "DST" },
129   { kSpecial0Mask | 0x7ff, (3 << 6) | 27, "modu", "DST" },
130   { kSpecial0Mask | 0x7ff, (2 << 6) | 28, "dmul", "DST" },
131   { kSpecial0Mask | 0x7ff, (3 << 6) | 28, "dmuh", "DST" },
132   { kSpecial0Mask | 0x7ff, (2 << 6) | 29, "dmulu", "DST" },
133   { kSpecial0Mask | 0x7ff, (3 << 6) | 29, "dmuhu", "DST" },
134   { kSpecial0Mask | 0x7ff, (2 << 6) | 30, "ddiv", "DST" },
135   { kSpecial0Mask | 0x7ff, (3 << 6) | 30, "dmod", "DST" },
136   { kSpecial0Mask | 0x7ff, (2 << 6) | 31, "ddivu", "DST" },
137   { kSpecial0Mask | 0x7ff, (3 << 6) | 31, "dmodu", "DST" },
138   { kSpecial0Mask | 0x7ff, (0 << 6) | 53, "seleqz", "DST" },
139   { kSpecial0Mask | 0x7ff, (0 << 6) | 55, "selnez", "DST" },
140   { kSpecial0Mask | (0x1f << 21) | 0x3f, (1 << 21) | 2, "rotr", "DTA", },
141   { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x10, "clz", "DS" },
142   { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x11, "clo", "DS" },
143   { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x12, "dclz", "DS" },
144   { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x13, "dclo", "DS" },
145   { kSpecial0Mask | 0x73f, 0x05, "lsa", "DSTj" },
146   { kSpecial0Mask | 0x73f, 0x15, "dlsa", "DSTj" },
147   // TODO: sdbbp
148 
149   // SPECIAL2
150   { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 2, "mul", "DST" },
151   { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 32, "clz", "DS" },
152   { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 33, "clo", "DS" },
153   { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 0, "madd", "ST" },
154   { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 1, "maddu", "ST" },
155   { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 2, "mul", "DST" },
156   { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 4, "msub", "ST" },
157   { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 5, "msubu", "ST" },
158   { kSpecial2Mask | 0x3f, (28 << kOpcodeShift) | 0x3f, "sdbbp", "" },  // TODO: code
159 
160   // SPECIAL3
161   { kSpecial3Mask | 0x3f, (31 << kOpcodeShift), "ext", "TSAZ", },
162   { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 3, "dext", "TSAZ", },
163   { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 4, "ins", "TSAz", },
164   { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 6, "dinsu", "TSFz", },
165   { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
166     (31 << kOpcodeShift) | (16 << 6) | 32,
167     "seb",
168     "DT", },
169   { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
170     (31 << kOpcodeShift) | (24 << 6) | 32,
171     "seh",
172     "DT", },
173   { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
174     (31 << kOpcodeShift) | 32,
175     "bitswap",
176     "DT", },
177   { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
178     (31 << kOpcodeShift) | 36,
179     "dbitswap",
180     "DT", },
181   { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
182     (31 << kOpcodeShift) | (2 << 6) | 36,
183     "dsbh",
184     "DT", },
185   { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
186     (31 << kOpcodeShift) | (5 << 6) | 36,
187     "dshd",
188     "DT", },
189   { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
190     (31 << kOpcodeShift) | (2 << 6) | 32,
191     "wsbh",
192     "DT", },
193   { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x26, "sc", "Tl", },
194   { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x27, "scd", "Tl", },
195   { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x36, "ll", "Tl", },
196   { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x37, "lld", "Tl", },
197 
198   // J-type instructions.
199   { kJTypeMask, 2 << kOpcodeShift, "j", "L" },
200   { kJTypeMask, 3 << kOpcodeShift, "jal", "L" },
201 
202   // I-type instructions.
203   { kITypeMask, 4 << kOpcodeShift, "beq", "STB" },
204   { kITypeMask, 5 << kOpcodeShift, "bne", "STB" },
205   { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (1 << 16), "bgez", "SB" },
206   { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (0 << 16), "bltz", "SB" },
207   { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (2 << 16), "bltzl", "SB" },
208   { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (16 << 16), "bltzal", "SB" },
209   { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (18 << 16), "bltzall", "SB" },
210   { kITypeMask | (0x1f << 16), 6 << kOpcodeShift | (0 << 16), "blez", "SB" },
211   { kITypeMask, 6 << kOpcodeShift, "bgeuc", "STB" },
212   { kITypeMask | (0x1f << 16), 7 << kOpcodeShift | (0 << 16), "bgtz", "SB" },
213   { kITypeMask, 7 << kOpcodeShift, "bltuc", "STB" },
214   { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (6 << 16), "dahi", "Si", },
215   { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (30 << 16), "dati", "Si", },
216 
217   { 0xffff0000, (4 << kOpcodeShift), "b", "B" },
218   { 0xffff0000, (1 << kOpcodeShift) | (17 << 16), "bal", "B" },
219 
220   { kITypeMask, 8 << kOpcodeShift, "beqc", "STB" },
221 
222   { kITypeMask, 8 << kOpcodeShift, "addi", "TSi", },
223   { kITypeMask, 9 << kOpcodeShift, "addiu", "TSi", },
224   { kITypeMask, 10 << kOpcodeShift, "slti", "TSi", },
225   { kITypeMask, 11 << kOpcodeShift, "sltiu", "TSi", },
226   { kITypeMask, 12 << kOpcodeShift, "andi", "TSi", },
227   { kITypeMask, 13 << kOpcodeShift, "ori", "TSi", },
228   { kITypeMask, 14 << kOpcodeShift, "xori", "TSi", },
229   { kITypeMask | (0x1f << 21), 15 << kOpcodeShift, "lui", "Ti", },
230   { kITypeMask, 15 << kOpcodeShift, "aui", "TSi", },
231 
232   { kITypeMask | (0x3e3 << 16), (17 << kOpcodeShift) | (8 << 21), "bc1f", "cB" },
233   { kITypeMask | (0x3e3 << 16), (17 << kOpcodeShift) | (8 << 21) | (1 << 16), "bc1t", "cB" },
234   { kITypeMask | (0x1f << 21), (17 << kOpcodeShift) | (9 << 21), "bc1eqz", "tB" },
235   { kITypeMask | (0x1f << 21), (17 << kOpcodeShift) | (13 << 21), "bc1nez", "tB" },
236 
237   { kITypeMask | (0x1f << 21), 22 << kOpcodeShift, "blezc", "TB" },
238 
239   // TODO: de-dup
240   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (1  << 21) | (1  << 16), "bgezc", "TB" },
241   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (2  << 21) | (2  << 16), "bgezc", "TB" },
242   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (3  << 21) | (3  << 16), "bgezc", "TB" },
243   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (4  << 21) | (4  << 16), "bgezc", "TB" },
244   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (5  << 21) | (5  << 16), "bgezc", "TB" },
245   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (6  << 21) | (6  << 16), "bgezc", "TB" },
246   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (7  << 21) | (7  << 16), "bgezc", "TB" },
247   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (8  << 21) | (8  << 16), "bgezc", "TB" },
248   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (9  << 21) | (9  << 16), "bgezc", "TB" },
249   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (10 << 21) | (10 << 16), "bgezc", "TB" },
250   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (11 << 21) | (11 << 16), "bgezc", "TB" },
251   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (12 << 21) | (12 << 16), "bgezc", "TB" },
252   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (13 << 21) | (13 << 16), "bgezc", "TB" },
253   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (14 << 21) | (14 << 16), "bgezc", "TB" },
254   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (15 << 21) | (15 << 16), "bgezc", "TB" },
255   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (16 << 21) | (16 << 16), "bgezc", "TB" },
256   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (17 << 21) | (17 << 16), "bgezc", "TB" },
257   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (18 << 21) | (18 << 16), "bgezc", "TB" },
258   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (19 << 21) | (19 << 16), "bgezc", "TB" },
259   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (20 << 21) | (20 << 16), "bgezc", "TB" },
260   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (21 << 21) | (21 << 16), "bgezc", "TB" },
261   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (22 << 21) | (22 << 16), "bgezc", "TB" },
262   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (23 << 21) | (23 << 16), "bgezc", "TB" },
263   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (24 << 21) | (24 << 16), "bgezc", "TB" },
264   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (25 << 21) | (25 << 16), "bgezc", "TB" },
265   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (26 << 21) | (26 << 16), "bgezc", "TB" },
266   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (27 << 21) | (27 << 16), "bgezc", "TB" },
267   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (28 << 21) | (28 << 16), "bgezc", "TB" },
268   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (29 << 21) | (29 << 16), "bgezc", "TB" },
269   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (30 << 21) | (30 << 16), "bgezc", "TB" },
270   { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (31 << 21) | (31 << 16), "bgezc", "TB" },
271 
272   { kITypeMask, 22 << kOpcodeShift, "bgec", "STB" },
273 
274   { kITypeMask | (0x1f << 21), 23 << kOpcodeShift, "bgtzc", "TB" },
275 
276   // TODO: de-dup
277   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (1  << 21) | (1  << 16), "bltzc", "TB" },
278   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (2  << 21) | (2  << 16), "bltzc", "TB" },
279   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (3  << 21) | (3  << 16), "bltzc", "TB" },
280   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (4  << 21) | (4  << 16), "bltzc", "TB" },
281   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (5  << 21) | (5  << 16), "bltzc", "TB" },
282   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (6  << 21) | (6  << 16), "bltzc", "TB" },
283   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (7  << 21) | (7  << 16), "bltzc", "TB" },
284   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (8  << 21) | (8  << 16), "bltzc", "TB" },
285   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (9  << 21) | (9  << 16), "bltzc", "TB" },
286   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (10 << 21) | (10 << 16), "bltzc", "TB" },
287   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (11 << 21) | (11 << 16), "bltzc", "TB" },
288   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (12 << 21) | (12 << 16), "bltzc", "TB" },
289   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (13 << 21) | (13 << 16), "bltzc", "TB" },
290   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (14 << 21) | (14 << 16), "bltzc", "TB" },
291   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (15 << 21) | (15 << 16), "bltzc", "TB" },
292   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (16 << 21) | (16 << 16), "bltzc", "TB" },
293   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (17 << 21) | (17 << 16), "bltzc", "TB" },
294   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (18 << 21) | (18 << 16), "bltzc", "TB" },
295   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (19 << 21) | (19 << 16), "bltzc", "TB" },
296   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (20 << 21) | (20 << 16), "bltzc", "TB" },
297   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (21 << 21) | (21 << 16), "bltzc", "TB" },
298   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (22 << 21) | (22 << 16), "bltzc", "TB" },
299   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (23 << 21) | (23 << 16), "bltzc", "TB" },
300   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (24 << 21) | (24 << 16), "bltzc", "TB" },
301   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (25 << 21) | (25 << 16), "bltzc", "TB" },
302   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (26 << 21) | (26 << 16), "bltzc", "TB" },
303   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (27 << 21) | (27 << 16), "bltzc", "TB" },
304   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (28 << 21) | (28 << 16), "bltzc", "TB" },
305   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (29 << 21) | (29 << 16), "bltzc", "TB" },
306   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (30 << 21) | (30 << 16), "bltzc", "TB" },
307   { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (31 << 21) | (31 << 16), "bltzc", "TB" },
308 
309   { kITypeMask, 23 << kOpcodeShift, "bltc", "STB" },
310 
311   { kITypeMask, 24 << kOpcodeShift, "bnec", "STB" },
312 
313   { kITypeMask, 25 << kOpcodeShift, "daddiu", "TSi", },
314   { kITypeMask, 29 << kOpcodeShift, "daui", "TSi", },
315 
316   { kITypeMask, 32u << kOpcodeShift, "lb", "TO", },
317   { kITypeMask, 33u << kOpcodeShift, "lh", "TO", },
318   { kITypeMask, 34u << kOpcodeShift, "lwl", "TO", },
319   { kITypeMask, 35u << kOpcodeShift, "lw", "TO", },
320   { kITypeMask, 36u << kOpcodeShift, "lbu", "TO", },
321   { kITypeMask, 37u << kOpcodeShift, "lhu", "TO", },
322   { kITypeMask, 38u << kOpcodeShift, "lwr", "TO", },
323   { kITypeMask, 39u << kOpcodeShift, "lwu", "TO", },
324   { kITypeMask, 40u << kOpcodeShift, "sb", "TO", },
325   { kITypeMask, 41u << kOpcodeShift, "sh", "TO", },
326   { kITypeMask, 42u << kOpcodeShift, "swl", "TO", },
327   { kITypeMask, 43u << kOpcodeShift, "sw", "TO", },
328   { kITypeMask, 46u << kOpcodeShift, "swr", "TO", },
329   { kITypeMask, 48u << kOpcodeShift, "ll", "TO", },
330   { kITypeMask, 49u << kOpcodeShift, "lwc1", "tO", },
331   { kJTypeMask, 50u << kOpcodeShift, "bc", "P" },
332   { kITypeMask, 53u << kOpcodeShift, "ldc1", "tO", },
333   { kITypeMask | (0x1f << 21), 54u << kOpcodeShift, "jic", "Ti" },
334   { kITypeMask | (1 << 21), (54u << kOpcodeShift) | (1 << 21), "beqzc", "Sb" },  // TODO: de-dup?
335   { kITypeMask | (1 << 22), (54u << kOpcodeShift) | (1 << 22), "beqzc", "Sb" },
336   { kITypeMask | (1 << 23), (54u << kOpcodeShift) | (1 << 23), "beqzc", "Sb" },
337   { kITypeMask | (1 << 24), (54u << kOpcodeShift) | (1 << 24), "beqzc", "Sb" },
338   { kITypeMask | (1 << 25), (54u << kOpcodeShift) | (1 << 25), "beqzc", "Sb" },
339   { kITypeMask, 55u << kOpcodeShift, "ld", "TO", },
340   { kITypeMask, 56u << kOpcodeShift, "sc", "TO", },
341   { kITypeMask, 57u << kOpcodeShift, "swc1", "tO", },
342   { kJTypeMask, 58u << kOpcodeShift, "balc", "P" },
343   { kITypeMask | (0x1f << 16), (59u << kOpcodeShift) | (30 << 16), "auipc", "Si" },
344   { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (0 << 19), "addiupc", "Sp" },
345   { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (1 << 19), "lwpc", "So" },
346   { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (2 << 19), "lwupc", "So" },
347   { kITypeMask | (0x7 << 18), (59u << kOpcodeShift) | (6 << 18), "ldpc", "S0" },
348   { kITypeMask, 61u << kOpcodeShift, "sdc1", "tO", },
349   { kITypeMask | (0x1f << 21), 62u << kOpcodeShift, "jialc", "Ti" },
350   { kITypeMask | (1 << 21), (62u << kOpcodeShift) | (1 << 21), "bnezc", "Sb" },  // TODO: de-dup?
351   { kITypeMask | (1 << 22), (62u << kOpcodeShift) | (1 << 22), "bnezc", "Sb" },
352   { kITypeMask | (1 << 23), (62u << kOpcodeShift) | (1 << 23), "bnezc", "Sb" },
353   { kITypeMask | (1 << 24), (62u << kOpcodeShift) | (1 << 24), "bnezc", "Sb" },
354   { kITypeMask | (1 << 25), (62u << kOpcodeShift) | (1 << 25), "bnezc", "Sb" },
355   { kITypeMask, 63u << kOpcodeShift, "sd", "TO", },
356 
357   // Floating point.
358   { kFpMask | (0x1f << 21), kCop1 | (0x00 << 21), "mfc1", "Td" },
359   { kFpMask | (0x1f << 21), kCop1 | (0x01 << 21), "dmfc1", "Td" },
360   { kFpMask | (0x1f << 21), kCop1 | (0x03 << 21), "mfhc1", "Td" },
361   { kFpMask | (0x1f << 21), kCop1 | (0x04 << 21), "mtc1", "Td" },
362   { kFpMask | (0x1f << 21), kCop1 | (0x05 << 21), "dmtc1", "Td" },
363   { kFpMask | (0x1f << 21), kCop1 | (0x07 << 21), "mthc1", "Td" },
364   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 1, "cmp.un.s", "adt" },
365   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 2, "cmp.eq.s", "adt" },
366   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 3, "cmp.ueq.s", "adt" },
367   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 4, "cmp.lt.s", "adt" },
368   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 5, "cmp.ult.s", "adt" },
369   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 6, "cmp.le.s", "adt" },
370   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 7, "cmp.ule.s", "adt" },
371   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 17, "cmp.or.s", "adt" },
372   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 18, "cmp.une.s", "adt" },
373   { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 19, "cmp.ne.s", "adt" },
374   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 1, "cmp.un.d", "adt" },
375   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 2, "cmp.eq.d", "adt" },
376   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 3, "cmp.ueq.d", "adt" },
377   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 4, "cmp.lt.d", "adt" },
378   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 5, "cmp.ult.d", "adt" },
379   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 6, "cmp.le.d", "adt" },
380   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 7, "cmp.ule.d", "adt" },
381   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 17, "cmp.or.d", "adt" },
382   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 18, "cmp.une.d", "adt" },
383   { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 19, "cmp.ne.d", "adt" },
384   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 0, "add", "fadt" },
385   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 1, "sub", "fadt" },
386   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 2, "mul", "fadt" },
387   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 3, "div", "fadt" },
388   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 4, "sqrt", "fad" },
389   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 5, "abs", "fad" },
390   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 6, "mov", "fad" },
391   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 7, "neg", "fad" },
392   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 8, "round.l", "fad" },
393   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 9, "trunc.l", "fad" },
394   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 10, "ceil.l", "fad" },
395   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 11, "floor.l", "fad" },
396   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 12, "round.w", "fad" },
397   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 13, "trunc.w", "fad" },
398   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 14, "ceil.w", "fad" },
399   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 15, "floor.w", "fad" },
400   { kFpMask | (0x201 << 16), kCop1 | (0x200 << 16) | 17, "movf", "fadc" },
401   { kFpMask | (0x201 << 16), kCop1 | (0x201 << 16) | 17, "movt", "fadc" },
402   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 18, "movz", "fadT" },
403   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 19, "movn", "fadT" },
404   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 20, "seleqz", "fadt" },
405   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 23, "selnez", "fadt" },
406   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 26, "rint", "fad" },
407   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 27, "class", "fad" },
408   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 32, "cvt.s", "fad" },
409   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 33, "cvt.d", "fad" },
410   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 36, "cvt.w", "fad" },
411   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 37, "cvt.l", "fad" },
412   { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 38, "cvt.ps", "fad" },
413   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 49, "c.un", "fCdt" },
414   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 50, "c.eq", "fCdt" },
415   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 51, "c.ueq", "fCdt" },
416   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 52, "c.olt", "fCdt" },
417   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 53, "c.ult", "fCdt" },
418   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 54, "c.ole", "fCdt" },
419   { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 55, "c.ule", "fCdt" },
420   { kFpMask, kCop1 | 0x10, "sel", "fadt" },
421   { kFpMask, kCop1 | 0x1e, "max", "fadt" },
422   { kFpMask, kCop1 | 0x1c, "min", "fadt" },
423 
424   // MSA instructions.
425   { kMsaMask | (0x1f << 21), kMsa | (0x0 << 21) | 0x1e, "and.v", "kmn" },
426   { kMsaMask | (0x1f << 21), kMsa | (0x1 << 21) | 0x1e, "or.v", "kmn" },
427   { kMsaMask | (0x1f << 21), kMsa | (0x2 << 21) | 0x1e, "nor.v", "kmn" },
428   { kMsaMask | (0x1f << 21), kMsa | (0x3 << 21) | 0x1e, "xor.v", "kmn" },
429   { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0xe, "addv", "Vkmn" },
430   { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0xe, "subv", "Vkmn" },
431   { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x12, "mulv", "Vkmn" },
432   { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x12, "div_s", "Vkmn" },
433   { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x12, "div_u", "Vkmn" },
434   { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x12, "mod_s", "Vkmn" },
435   { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x12, "mod_u", "Vkmn" },
436   { kMsaMask | (0xf << 22), kMsa | (0x0 << 22) | 0x1b, "fadd", "Ukmn" },
437   { kMsaMask | (0xf << 22), kMsa | (0x1 << 22) | 0x1b, "fsub", "Ukmn" },
438   { kMsaMask | (0xf << 22), kMsa | (0x2 << 22) | 0x1b, "fmul", "Ukmn" },
439   { kMsaMask | (0xf << 22), kMsa | (0x3 << 22) | 0x1b, "fdiv", "Ukmn" },
440   { kMsaMask | (0x1ff << 17), kMsa | (0x19e << 17) | 0x1e, "ffint_s", "ukm" },
441   { kMsaMask | (0x1ff << 17), kMsa | (0x19c << 17) | 0x1e, "ftint_s", "ukm" },
442   { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0xd, "sll", "Vkmn" },
443   { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0xd, "sra", "Vkmn" },
444   { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0xd, "srl", "Vkmn" },
445   { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x9, "slli", "kmW" },
446   { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0x9, "srai", "kmW" },
447   { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0x9, "srli", "kmW" },
448   { kMsaMask | (0x3ff << 16), kMsa | (0xbe << 16) | 0x19, "move.v", "km" },
449   { kMsaMask | (0xf << 22), kMsa | (0x1 << 22) | 0x19, "splati", "kX" },
450   { kMsaMask | (0xff << 18), kMsa | (0xc0 << 18) | 0x1e, "fill", "vkD" },
451   { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x7, "ldi", "kx" },
452   { kMsaSpecialMask | (0xf << 2), kMsa | (0x8 << 2), "ld", "kw" },
453   { kMsaSpecialMask | (0xf << 2), kMsa | (0x9 << 2), "st", "kw" },
454 };
455 
ReadU32(const uint8_t * ptr)456 static uint32_t ReadU32(const uint8_t* ptr) {
457   // We only support little-endian MIPS.
458   return ptr[0] | (ptr[1] << 8) | (ptr[2] << 16) | (ptr[3] << 24);
459 }
460 
Dump(std::ostream & os,const uint8_t * instr_ptr)461 size_t DisassemblerMips::Dump(std::ostream& os, const uint8_t* instr_ptr) {
462   uint32_t instruction = ReadU32(instr_ptr);
463 
464   uint32_t rs = (instruction >> 21) & 0x1f;  // I-type, R-type.
465   uint32_t rt = (instruction >> 16) & 0x1f;  // I-type, R-type.
466   uint32_t rd = (instruction >> 11) & 0x1f;  // R-type.
467   uint32_t sa = (instruction >>  6) & 0x1f;  // R-type.
468 
469   std::string opcode;
470   std::ostringstream args;
471 
472   // TODO: remove this!
473   uint32_t op = (instruction >> 26) & 0x3f;
474   uint32_t function = (instruction & 0x3f);  // R-type.
475   opcode = StringPrintf("op=%d fn=%d", op, function);
476 
477   for (size_t i = 0; i < arraysize(gMipsInstructions); ++i) {
478     if (gMipsInstructions[i].Matches(instruction)) {
479       opcode = gMipsInstructions[i].name;
480       for (const char* args_fmt = gMipsInstructions[i].args_fmt; *args_fmt; ++args_fmt) {
481         switch (*args_fmt) {
482           case 'A':  // sa (shift amount or [d]ins/[d]ext position).
483             args << sa;
484             break;
485           case 'B':  // Branch offset.
486             {
487               int32_t offset = static_cast<int16_t>(instruction & 0xffff);
488               offset <<= 2;
489               offset += 4;  // Delay slot.
490               args << FormatInstructionPointer(instr_ptr + offset)
491                    << StringPrintf("  ; %+d", offset);
492             }
493             break;
494           case 'b':  // 21-bit branch offset.
495             {
496               int32_t offset = (instruction & 0x1fffff) - ((instruction & 0x100000) << 1);
497               offset <<= 2;
498               offset += 4;  // Delay slot.
499               args << FormatInstructionPointer(instr_ptr + offset)
500                    << StringPrintf("  ; %+d", offset);
501             }
502             break;
503           case 'C':  // Floating-point condition code flag in c.<cond>.fmt.
504             args << "cc" << (sa >> 2);
505             break;
506           case 'c':  // Floating-point condition code flag in bc1f/bc1t and movf/movt.
507             args << "cc" << (rt >> 2);
508             break;
509           case 'D': args << 'r' << rd; break;
510           case 'd': args << 'f' << rd; break;
511           case 'a': args << 'f' << sa; break;
512           case 'F': args << (sa + 32); break;  // dinsu position.
513           case 'f':  // Floating point "fmt".
514             {
515               size_t fmt = (instruction >> 21) & 0x7;  // TODO: other fmts?
516               switch (fmt) {
517                 case 0: opcode += ".s"; break;
518                 case 1: opcode += ".d"; break;
519                 case 4: opcode += ".w"; break;
520                 case 5: opcode += ".l"; break;
521                 case 6: opcode += ".ps"; break;
522                 default: opcode += ".?"; break;
523               }
524               continue;  // No ", ".
525             }
526           case 'i':  // Sign-extended lower 16-bit immediate.
527             args << static_cast<int16_t>(instruction & 0xffff);
528             break;
529           case 'j':  // sa value for lsa/dlsa.
530             args << (sa + 1);
531             break;
532           case 'L':  // Jump label.
533             {
534               // TODO: is this right?
535               uint32_t instr_index = (instruction & 0x1ffffff);
536               uint32_t target = (instr_index << 2);
537               target |= (reinterpret_cast<uintptr_t>(instr_ptr + 4) & 0xf0000000);
538               args << reinterpret_cast<void*>(target);
539             }
540             break;
541           case 'l':  // 9-bit signed offset
542             {
543               int32_t offset = static_cast<int16_t>(instruction) >> 7;
544               args << StringPrintf("%+d(r%d)", offset, rs);
545             }
546             break;
547           case 'O':  // +x(rs)
548             {
549               int32_t offset = static_cast<int16_t>(instruction & 0xffff);
550               args << StringPrintf("%+d(r%d)", offset, rs);
551               if (rs == 17) {
552                 args << "  ; ";
553                 GetDisassemblerOptions()->thread_offset_name_function_(args, offset);
554               }
555             }
556             break;
557           case 'o':  // 19-bit offset in lwpc and lwupc.
558             {
559               int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1);
560               offset <<= 2;
561               args << FormatInstructionPointer(instr_ptr + offset);
562               args << StringPrintf("  ; %+d", offset);
563             }
564             break;
565           case '0':  // 18-bit offset in ldpc.
566             {
567               int32_t offset = (instruction & 0x3ffff) - ((instruction & 0x20000) << 1);
568               offset <<= 3;
569               uintptr_t ptr = RoundDown(reinterpret_cast<uintptr_t>(instr_ptr), 8);
570               args << FormatInstructionPointer(reinterpret_cast<const uint8_t*>(ptr + offset));
571               args << StringPrintf("  ; %+d", offset);
572             }
573             break;
574           case 'P':  // 26-bit offset in bc and balc.
575             {
576               int32_t offset = (instruction & 0x3ffffff) - ((instruction & 0x2000000) << 1);
577               offset <<= 2;
578               offset += 4;
579               args << FormatInstructionPointer(instr_ptr + offset);
580               args << StringPrintf("  ; %+d", offset);
581             }
582             break;
583           case 'p':  // 19-bit offset in addiupc.
584             {
585               int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1);
586               args << offset << "  ; move r" << rs << ", ";
587               args << FormatInstructionPointer(instr_ptr + (offset << 2));
588             }
589             break;
590           case 'S': args << 'r' << rs; break;
591           case 's': args << 'f' << rs; break;
592           case 'T': args << 'r' << rt; break;
593           case 't': args << 'f' << rt; break;
594           case 'Z': args << (rd + 1); break;  // sz ([d]ext size).
595           case 'z': args << (rd - sa + 1); break;  // sz ([d]ins, dinsu size).
596           case 'k': args << 'w' << sa; break;
597           case 'm': args << 'w' << rd; break;
598           case 'n': args << 'w' << rt; break;
599           case 'U':  // MSA 1-bit df (word/doubleword), position 21.
600             {
601               int32_t df = (instruction >> 21) & 0x1;
602               switch (df) {
603                 case 0: opcode += ".w"; break;
604                 case 1: opcode += ".d"; break;
605               }
606               continue;  // No ", ".
607             }
608           case 'u':  // MSA 1-bit df (word/doubleword), position 16.
609             {
610               int32_t df = (instruction >> 16) & 0x1;
611               switch (df) {
612                 case 0: opcode += ".w"; break;
613                 case 1: opcode += ".d"; break;
614               }
615               continue;  // No ", ".
616             }
617           case 'V':  // MSA 2-bit df, position 21.
618             {
619               int32_t df = (instruction >> 21) & 0x3;
620               switch (df) {
621                 case 0: opcode += ".b"; break;
622                 case 1: opcode += ".h"; break;
623                 case 2: opcode += ".w"; break;
624                 case 3: opcode += ".d"; break;
625               }
626               continue;  // No ", ".
627             }
628           case 'v':  // MSA 2-bit df, position 16.
629             {
630               int32_t df = (instruction >> 16) & 0x3;
631               switch (df) {
632                 case 0: opcode += ".b"; break;
633                 case 1: opcode += ".h"; break;
634                 case 2: opcode += ".w"; break;
635                 case 3: opcode += ".d"; break;
636               }
637               continue;  // No ", ".
638             }
639           case 'W':  // MSA df/m.
640             {
641               int32_t df_m = (instruction >> 16) & 0x7f;
642               if ((df_m & (0x1 << 6)) == 0) {
643                 opcode += ".d";
644                 args << (df_m & 0x3f);
645                 break;
646               }
647               if ((df_m & (0x1 << 5)) == 0) {
648                 opcode += ".w";
649                 args << (df_m & 0x1f);
650                 break;
651               }
652               if ((df_m & (0x1 << 4)) == 0) {
653                 opcode += ".h";
654                 args << (df_m & 0xf);
655                 break;
656               }
657               if ((df_m & (0x1 << 3)) == 0) {
658                 opcode += ".b";
659                 args << (df_m & 0x7);
660               }
661               break;
662             }
663           case 'w':  // MSA +x(rs).
664             {
665               int32_t df = instruction & 0x3;
666               int32_t s10 = (instruction >> 16) & 0x3ff;
667               s10 -= (s10 & 0x200) << 1;  // Sign-extend s10.
668               switch (df) {
669                 case 0: opcode += ".b"; break;
670                 case 1: opcode += ".h"; break;
671                 case 2: opcode += ".w"; break;
672                 case 3: opcode += ".d"; break;
673               }
674               args << StringPrintf("%+d(r%d)", s10 << df, rd);
675               break;
676             }
677           case 'X':  // MSA df/n - ws[x].
678             {
679               int32_t df_n = (instruction >> 16) & 0x3f;
680               if ((df_n & (0x3 << 4)) == 0) {
681                 opcode += ".b";
682                 args << 'w' << rd << '[' << (df_n & 0xf) << ']';
683                 break;
684               }
685               if ((df_n & (0x3 << 3)) == 0) {
686                 opcode += ".h";
687                 args << 'w' << rd << '[' << (df_n & 0x7) << ']';
688                 break;
689               }
690               if ((df_n & (0x3 << 2)) == 0) {
691                 opcode += ".w";
692                 args << 'w' << rd << '[' << (df_n & 0x3) << ']';
693                 break;
694               }
695               if ((df_n & (0x3 << 1)) == 0) {
696                 opcode += ".d";
697                 args << 'w' << rd << '[' << (df_n & 0x1) << ']';
698               }
699               break;
700             }
701           case 'x':  // MSA i10.
702             {
703               int32_t df = (instruction >> 21) & 0x3;
704               int32_t i10 = (instruction >> 11) & 0x3ff;
705               i10 -= (i10 & 0x200) << 1;  // Sign-extend i10.
706               switch (df) {
707                 case 0: opcode += ".b"; break;
708                 case 1: opcode += ".h"; break;
709                 case 2: opcode += ".w"; break;
710                 case 3: opcode += ".d"; break;
711               }
712               args << i10;
713               break;
714             }
715         }
716         if (*(args_fmt + 1)) {
717           args << ", ";
718         }
719       }
720       break;
721     }
722   }
723 
724   // Special cases for sequences of:
725   //   pc-relative +/- 2GB branch:
726   //     auipc  reg, imm
727   //     jic    reg, imm
728   //   pc-relative +/- 2GB branch and link:
729   //     auipc  reg, imm
730   //     jialc  reg, imm
731   if (((op == 0x36 || op == 0x3E) && rs == 0 && rt != 0) &&  // ji[al]c
732       last_ptr_ && (intptr_t)instr_ptr - (intptr_t)last_ptr_ == 4 &&
733       (last_instr_ & 0xFC1F0000) == 0xEC1E0000 &&  // auipc
734       ((last_instr_ >> 21) & 0x1F) == rt) {
735     uint32_t offset = (last_instr_ << 16) | (instruction & 0xFFFF);
736     offset -= (offset & 0x8000) << 1;
737     offset -= 4;
738     if (op == 0x36) {
739       args << "  ; bc ";
740     } else {
741       args << "  ; balc ";
742     }
743     args << FormatInstructionPointer(instr_ptr + (int32_t)offset);
744     args << StringPrintf("  ; %+d", (int32_t)offset);
745   }
746 
747   os << FormatInstructionPointer(instr_ptr)
748      << StringPrintf(": %08x\t%-7s ", instruction, opcode.c_str())
749      << args.str() << '\n';
750   last_ptr_ = instr_ptr;
751   last_instr_ = instruction;
752   return 4;
753 }
754 
Dump(std::ostream & os,const uint8_t * begin,const uint8_t * end)755 void DisassemblerMips::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) {
756   for (const uint8_t* cur = begin; cur < end; cur += 4) {
757     Dump(os, cur);
758   }
759 }
760 
761 }  // namespace mips
762 }  // namespace art
763